llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir


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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9 %s

---
name: legal_s32_to_v2s16
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1

    ; GFX9-LABEL: name: legal_s32_to_v2s16
    ; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; GFX9: [[BUILD_VECTOR_TRUNC:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC [[COPY]](s32), [[COPY1]](s32)
    ; GFX9: S_NOP 0, implicit [[BUILD_VECTOR_TRUNC]](<2 x s16>)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %2:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %0, %1
    S_NOP 0, implicit %2
...