; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -S %s -scalarize-masked-mem-intrin -mtriple=x86_64-linux-gnu | FileCheck %s define void @scalarize_v2i64(<2 x i64>* %p, <2 x i1> %mask, <2 x i64> %data) { ; CHECK-LABEL: @scalarize_v2i64( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64>* [[P:%.*]] to i64* ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i1> [[MASK:%.*]], i64 0 ; CHECK-NEXT: br i1 [[TMP2]], label [[COND_STORE:%.*]], label [[ELSE:%.*]] ; CHECK: cond.store: ; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i64> [[DATA:%.*]], i64 0 ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i64, i64* [[TMP1]], i32 0 ; CHECK-NEXT: store i64 [[TMP3]], i64* [[TMP4]], align 8 ; CHECK-NEXT: br label [[ELSE]] ; CHECK: else: ; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i1> [[MASK]], i64 1 ; CHECK-NEXT: br i1 [[TMP5]], label [[COND_STORE1:%.*]], label [[ELSE2:%.*]] ; CHECK: cond.store1: ; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x i64> [[DATA]], i64 1 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i64, i64* [[TMP1]], i32 1 ; CHECK-NEXT: store i64 [[TMP6]], i64* [[TMP7]], align 8 ; CHECK-NEXT: br label [[ELSE2]] ; CHECK: else2: ; CHECK-NEXT: ret void ; call void @llvm.masked.store.v2i64.p0v2i64(<2 x i64> %data, <2 x i64>* %p, i32 128, <2 x i1> %mask) ret void } define void @scalarize_v2i64_ones_mask(<2 x i64>* %p, <2 x i64> %data) { ; CHECK-LABEL: @scalarize_v2i64_ones_mask( ; CHECK-NEXT: store <2 x i64> [[DATA:%.*]], <2 x i64>* [[P:%.*]], align 8 ; CHECK-NEXT: ret void ; call void @llvm.masked.store.v2i64.p0v2i64(<2 x i64> %data, <2 x i64>* %p, i32 8, <2 x i1> ) ret void } define void @scalarize_v2i64_zero_mask(<2 x i64>* %p, <2 x i64> %data) { ; CHECK-LABEL: @scalarize_v2i64_zero_mask( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64>* [[P:%.*]] to i64* ; CHECK-NEXT: ret void ; call void @llvm.masked.store.v2i64.p0v2i64(<2 x i64> %data, <2 x i64>* %p, i32 8, <2 x i1> ) ret void } define void @scalarize_v2i64_const_mask(<2 x i64>* %p, <2 x i64> %data) { ; CHECK-LABEL: @scalarize_v2i64_const_mask( ; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64>* [[P:%.*]] to i64* ; CHECK-NEXT: [[TMP2:%.*]] = extractelement <2 x i64> [[DATA:%.*]], i64 1 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, i64* [[TMP1]], i32 1 ; CHECK-NEXT: store i64 [[TMP2]], i64* [[TMP3]], align 8 ; CHECK-NEXT: ret void ; call void @llvm.masked.store.v2i64.p0v2i64(<2 x i64> %data, <2 x i64>* %p, i32 8, <2 x i1> ) ret void } declare void @llvm.masked.store.v2i64.p0v2i64(<2 x i64>, <2 x i64>*, i32, <2 x i1>)