; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s define <16 x i8> @sadd_sat_v16i8_constant() { ; CHECK-LABEL: @sadd_sat_v16i8_constant( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @sadd_sat_v16i8_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v16i8_constant_underflow( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @sadd_sat_v16i8_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v16i8_constant_overflow( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @sadd_sat_v16i8_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v16i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) ; CHECK-NEXT: ret <16 x i8> [[TMP1]] ; %1 = call <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <32 x i8> @sadd_sat_v32i8_constant() { ; CHECK-LABEL: @sadd_sat_v32i8_constant( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @sadd_sat_v32i8_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v32i8_constant_underflow( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @sadd_sat_v32i8_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v32i8_constant_overflow( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @sadd_sat_v32i8_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v32i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) ; CHECK-NEXT: ret <32 x i8> [[TMP1]] ; %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <64 x i8> @sadd_sat_v64i8_constant() { ; CHECK-LABEL: @sadd_sat_v64i8_constant( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @sadd_sat_v64i8_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v64i8_constant_underflow( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @sadd_sat_v64i8_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v64i8_constant_overflow( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @sadd_sat_v64i8_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v64i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) ; CHECK-NEXT: ret <64 x i8> [[TMP1]] ; %1 = call <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <8 x i16> @sadd_sat_v8i16_constant() { ; CHECK-LABEL: @sadd_sat_v8i16_constant( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @sadd_sat_v8i16_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v8i16_constant_underflow( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @sadd_sat_v8i16_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v8i16_constant_overflow( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @sadd_sat_v8i16_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v8i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) ; CHECK-NEXT: ret <8 x i16> [[TMP1]] ; %1 = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <16 x i16> @sadd_sat_v16i16_constant() { ; CHECK-LABEL: @sadd_sat_v16i16_constant( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @sadd_sat_v16i16_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v16i16_constant_underflow( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @sadd_sat_v16i16_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v16i16_constant_overflow( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @sadd_sat_v16i16_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v16i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) ; CHECK-NEXT: ret <16 x i16> [[TMP1]] ; %1 = call <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <32 x i16> @sadd_sat_v32i16_constant() { ; CHECK-LABEL: @sadd_sat_v32i16_constant( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @sadd_sat_v32i16_constant_underflow() { ; CHECK-LABEL: @sadd_sat_v32i16_constant_underflow( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @sadd_sat_v32i16_constant_overflow() { ; CHECK-LABEL: @sadd_sat_v32i16_constant_overflow( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @sadd_sat_v32i16_constant_undefs() { ; CHECK-LABEL: @sadd_sat_v32i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) ; CHECK-NEXT: ret <32 x i16> [[TMP1]] ; %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <16 x i8> @ssub_sat_v16i8_constant() { ; CHECK-LABEL: @ssub_sat_v16i8_constant( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @ssub_sat_v16i8_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v16i8_constant_underflow( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @ssub_sat_v16i8_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v16i8_constant_overflow( ; CHECK-NEXT: ret <16 x i8> ; %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <16 x i8> @ssub_sat_v16i8_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v16i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) ; CHECK-NEXT: ret <16 x i8> [[TMP1]] ; %1 = call <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8> , <16 x i8> ) ret <16 x i8> %1 } define <32 x i8> @ssub_sat_v32i8_constant() { ; CHECK-LABEL: @ssub_sat_v32i8_constant( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @ssub_sat_v32i8_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v32i8_constant_underflow( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @ssub_sat_v32i8_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v32i8_constant_overflow( ; CHECK-NEXT: ret <32 x i8> ; %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <32 x i8> @ssub_sat_v32i8_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v32i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) ; CHECK-NEXT: ret <32 x i8> [[TMP1]] ; %1 = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> , <32 x i8> ) ret <32 x i8> %1 } define <64 x i8> @ssub_sat_v64i8_constant() { ; CHECK-LABEL: @ssub_sat_v64i8_constant( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @ssub_sat_v64i8_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v64i8_constant_underflow( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @ssub_sat_v64i8_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v64i8_constant_overflow( ; CHECK-NEXT: ret <64 x i8> ; %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <64 x i8> @ssub_sat_v64i8_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v64i8_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) ; CHECK-NEXT: ret <64 x i8> [[TMP1]] ; %1 = call <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8> , <64 x i8> ) ret <64 x i8> %1 } define <8 x i16> @ssub_sat_v8i16_constant() { ; CHECK-LABEL: @ssub_sat_v8i16_constant( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @ssub_sat_v8i16_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v8i16_constant_underflow( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @ssub_sat_v8i16_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v8i16_constant_overflow( ; CHECK-NEXT: ret <8 x i16> ; %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <8 x i16> @ssub_sat_v8i16_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v8i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) ; CHECK-NEXT: ret <8 x i16> [[TMP1]] ; %1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> , <8 x i16> ) ret <8 x i16> %1 } define <16 x i16> @ssub_sat_v16i16_constant() { ; CHECK-LABEL: @ssub_sat_v16i16_constant( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @ssub_sat_v16i16_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v16i16_constant_underflow( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @ssub_sat_v16i16_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v16i16_constant_overflow( ; CHECK-NEXT: ret <16 x i16> ; %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <16 x i16> @ssub_sat_v16i16_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v16i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) ; CHECK-NEXT: ret <16 x i16> [[TMP1]] ; %1 = call <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16> , <16 x i16> ) ret <16 x i16> %1 } define <32 x i16> @ssub_sat_v32i16_constant() { ; CHECK-LABEL: @ssub_sat_v32i16_constant( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @ssub_sat_v32i16_constant_underflow() { ; CHECK-LABEL: @ssub_sat_v32i16_constant_underflow( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @ssub_sat_v32i16_constant_overflow() { ; CHECK-LABEL: @ssub_sat_v32i16_constant_overflow( ; CHECK-NEXT: ret <32 x i16> ; %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } define <32 x i16> @ssub_sat_v32i16_constant_undefs() { ; CHECK-LABEL: @ssub_sat_v32i16_constant_undefs( ; CHECK-NEXT: [[TMP1:%.*]] = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) ; CHECK-NEXT: ret <32 x i16> [[TMP1]] ; %1 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> , <32 x i16> ) ret <32 x i16> %1 } declare <16 x i8> @llvm.sadd.sat.v16i8(<16 x i8>, <16 x i8>) nounwind readnone declare <16 x i8> @llvm.ssub.sat.v16i8(<16 x i8>, <16 x i8>) nounwind readnone declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>) nounwind readnone declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>) nounwind readnone declare <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8>, <32 x i8>) nounwind readnone declare <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8>, <32 x i8>) nounwind readnone declare <16 x i16> @llvm.sadd.sat.v16i16(<16 x i16>, <16 x i16>) nounwind readnone declare <16 x i16> @llvm.ssub.sat.v16i16(<16 x i16>, <16 x i16>) nounwind readnone declare <64 x i8> @llvm.sadd.sat.v64i8(<64 x i8>, <64 x i8>) nounwind readnone declare <64 x i8> @llvm.ssub.sat.v64i8(<64 x i8>, <64 x i8>) nounwind readnone declare <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16>, <32 x i16>) nounwind readnone declare <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16>, <32 x i16>) nounwind readnone