; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s ; RUN: llc < %s -mcpu=generic -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=CHECK32 declare i4 @llvm.ssub.sat.i4 (i4, i4) declare i32 @llvm.ssub.sat.i32 (i32, i32) declare i64 @llvm.ssub.sat.i64 (i64, i64) declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>) define i32 @func(i32 %x, i32 %y) { ; CHECK-LABEL: func: ; CHECK: # %bb.0: ; CHECK-NEXT: xorl %eax, %eax ; CHECK-NEXT: movl %edi, %ecx ; CHECK-NEXT: subl %esi, %ecx ; CHECK-NEXT: setns %al ; CHECK-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF ; CHECK-NEXT: subl %esi, %edi ; CHECK-NEXT: cmovnol %edi, %eax ; CHECK-NEXT: retq ; ; CHECK32-LABEL: func: ; CHECK32: # %bb.0: ; CHECK32-NEXT: pushl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 8 ; CHECK32-NEXT: .cfi_offset %esi, -8 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx ; CHECK32-NEXT: xorl %ecx, %ecx ; CHECK32-NEXT: movl %eax, %esi ; CHECK32-NEXT: subl %edx, %esi ; CHECK32-NEXT: setns %cl ; CHECK32-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF ; CHECK32-NEXT: subl %edx, %eax ; CHECK32-NEXT: cmovol %ecx, %eax ; CHECK32-NEXT: popl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 4 ; CHECK32-NEXT: retl %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %y); ret i32 %tmp; } define i64 @func2(i64 %x, i64 %y) { ; CHECK-LABEL: func2: ; CHECK: # %bb.0: ; CHECK-NEXT: xorl %ecx, %ecx ; CHECK-NEXT: movq %rdi, %rax ; CHECK-NEXT: subq %rsi, %rax ; CHECK-NEXT: setns %cl ; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF ; CHECK-NEXT: addq %rcx, %rax ; CHECK-NEXT: subq %rsi, %rdi ; CHECK-NEXT: cmovnoq %rdi, %rax ; CHECK-NEXT: retq ; ; CHECK32-LABEL: func2: ; CHECK32: # %bb.0: ; CHECK32-NEXT: pushl %ebp ; CHECK32-NEXT: .cfi_def_cfa_offset 8 ; CHECK32-NEXT: pushl %ebx ; CHECK32-NEXT: .cfi_def_cfa_offset 12 ; CHECK32-NEXT: pushl %edi ; CHECK32-NEXT: .cfi_def_cfa_offset 16 ; CHECK32-NEXT: pushl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 20 ; CHECK32-NEXT: .cfi_offset %esi, -20 ; CHECK32-NEXT: .cfi_offset %edi, -16 ; CHECK32-NEXT: .cfi_offset %ebx, -12 ; CHECK32-NEXT: .cfi_offset %ebp, -8 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ebx ; CHECK32-NEXT: subl {{[0-9]+}}(%esp), %edi ; CHECK32-NEXT: movl %ebx, %ebp ; CHECK32-NEXT: sbbl %esi, %ebp ; CHECK32-NEXT: movl %ebp, %eax ; CHECK32-NEXT: sarl $31, %eax ; CHECK32-NEXT: xorl %ecx, %ecx ; CHECK32-NEXT: testl %ebp, %ebp ; CHECK32-NEXT: setns %cl ; CHECK32-NEXT: movl %ecx, %edx ; CHECK32-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF ; CHECK32-NEXT: testl %ebx, %ebx ; CHECK32-NEXT: setns %bl ; CHECK32-NEXT: cmpb %cl, %bl ; CHECK32-NEXT: setne %cl ; CHECK32-NEXT: testl %esi, %esi ; CHECK32-NEXT: setns %ch ; CHECK32-NEXT: cmpb %ch, %bl ; CHECK32-NEXT: setne %ch ; CHECK32-NEXT: testb %cl, %ch ; CHECK32-NEXT: cmovel %ebp, %edx ; CHECK32-NEXT: cmovel %edi, %eax ; CHECK32-NEXT: popl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 16 ; CHECK32-NEXT: popl %edi ; CHECK32-NEXT: .cfi_def_cfa_offset 12 ; CHECK32-NEXT: popl %ebx ; CHECK32-NEXT: .cfi_def_cfa_offset 8 ; CHECK32-NEXT: popl %ebp ; CHECK32-NEXT: .cfi_def_cfa_offset 4 ; CHECK32-NEXT: retl %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %y); ret i64 %tmp; } define i4 @func3(i4 %x, i4 %y) { ; CHECK-LABEL: func3: ; CHECK: # %bb.0: ; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: shlb $4, %sil ; CHECK-NEXT: shlb $4, %al ; CHECK-NEXT: movl %eax, %ecx ; CHECK-NEXT: subb %sil, %cl ; CHECK-NEXT: setns %cl ; CHECK-NEXT: subb %sil, %al ; CHECK-NEXT: jno .LBB2_2 ; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: addb $127, %cl ; CHECK-NEXT: movl %ecx, %eax ; CHECK-NEXT: .LBB2_2: ; CHECK-NEXT: sarb $4, %al ; CHECK-NEXT: # kill: def $al killed $al killed $eax ; CHECK-NEXT: retq ; ; CHECK32-LABEL: func3: ; CHECK32: # %bb.0: ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %al ; CHECK32-NEXT: movb {{[0-9]+}}(%esp), %dl ; CHECK32-NEXT: shlb $4, %dl ; CHECK32-NEXT: shlb $4, %al ; CHECK32-NEXT: movl %eax, %ecx ; CHECK32-NEXT: subb %dl, %cl ; CHECK32-NEXT: setns %cl ; CHECK32-NEXT: subb %dl, %al ; CHECK32-NEXT: jno .LBB2_2 ; CHECK32-NEXT: # %bb.1: ; CHECK32-NEXT: addb $127, %cl ; CHECK32-NEXT: movl %ecx, %eax ; CHECK32-NEXT: .LBB2_2: ; CHECK32-NEXT: sarb $4, %al ; CHECK32-NEXT: retl %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %y); ret i4 %tmp; } define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) { ; CHECK-LABEL: vec: ; CHECK: # %bb.0: ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3] ; CHECK-NEXT: movd %xmm2, %ecx ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] ; CHECK-NEXT: movd %xmm2, %r8d ; CHECK-NEXT: xorl %edx, %edx ; CHECK-NEXT: movl %r8d, %esi ; CHECK-NEXT: subl %ecx, %esi ; CHECK-NEXT: setns %dl ; CHECK-NEXT: addl $2147483647, %edx # imm = 0x7FFFFFFF ; CHECK-NEXT: subl %ecx, %r8d ; CHECK-NEXT: cmovol %edx, %r8d ; CHECK-NEXT: movd %xmm1, %edx ; CHECK-NEXT: movd %xmm0, %ecx ; CHECK-NEXT: xorl %esi, %esi ; CHECK-NEXT: movl %ecx, %edi ; CHECK-NEXT: subl %edx, %edi ; CHECK-NEXT: setns %sil ; CHECK-NEXT: addl $2147483647, %esi # imm = 0x7FFFFFFF ; CHECK-NEXT: subl %edx, %ecx ; CHECK-NEXT: cmovol %esi, %ecx ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1] ; CHECK-NEXT: movd %xmm2, %edx ; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] ; CHECK-NEXT: movd %xmm2, %eax ; CHECK-NEXT: xorl %edi, %edi ; CHECK-NEXT: movl %eax, %esi ; CHECK-NEXT: subl %edx, %esi ; CHECK-NEXT: setns %dil ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF ; CHECK-NEXT: subl %edx, %eax ; CHECK-NEXT: cmovol %edi, %eax ; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,1,2,3] ; CHECK-NEXT: movd %xmm1, %r9d ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] ; CHECK-NEXT: movd %xmm0, %edx ; CHECK-NEXT: xorl %edi, %edi ; CHECK-NEXT: movl %edx, %esi ; CHECK-NEXT: subl %r9d, %esi ; CHECK-NEXT: setns %dil ; CHECK-NEXT: addl $2147483647, %edi # imm = 0x7FFFFFFF ; CHECK-NEXT: subl %r9d, %edx ; CHECK-NEXT: cmovol %edi, %edx ; CHECK-NEXT: movd %edx, %xmm0 ; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: movd %ecx, %xmm0 ; CHECK-NEXT: movd %r8d, %xmm2 ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: retq ; ; CHECK32-LABEL: vec: ; CHECK32: # %bb.0: ; CHECK32-NEXT: pushl %ebp ; CHECK32-NEXT: .cfi_def_cfa_offset 8 ; CHECK32-NEXT: pushl %ebx ; CHECK32-NEXT: .cfi_def_cfa_offset 12 ; CHECK32-NEXT: pushl %edi ; CHECK32-NEXT: .cfi_def_cfa_offset 16 ; CHECK32-NEXT: pushl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 20 ; CHECK32-NEXT: .cfi_offset %esi, -20 ; CHECK32-NEXT: .cfi_offset %edi, -16 ; CHECK32-NEXT: .cfi_offset %ebx, -12 ; CHECK32-NEXT: .cfi_offset %ebp, -8 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx ; CHECK32-NEXT: xorl %eax, %eax ; CHECK32-NEXT: movl %ecx, %esi ; CHECK32-NEXT: subl %edx, %esi ; CHECK32-NEXT: setns %al ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF ; CHECK32-NEXT: subl %edx, %ecx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edx ; CHECK32-NEXT: cmovol %eax, %ecx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: xorl %eax, %eax ; CHECK32-NEXT: movl %edx, %edi ; CHECK32-NEXT: subl %esi, %edi ; CHECK32-NEXT: setns %al ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF ; CHECK32-NEXT: subl %esi, %edx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %esi ; CHECK32-NEXT: cmovol %eax, %edx ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi ; CHECK32-NEXT: xorl %eax, %eax ; CHECK32-NEXT: movl %esi, %ebx ; CHECK32-NEXT: subl %edi, %ebx ; CHECK32-NEXT: setns %al ; CHECK32-NEXT: addl $2147483647, %eax # imm = 0x7FFFFFFF ; CHECK32-NEXT: subl %edi, %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %edi ; CHECK32-NEXT: cmovol %eax, %esi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK32-NEXT: xorl %ebx, %ebx ; CHECK32-NEXT: movl %edi, %ebp ; CHECK32-NEXT: subl %eax, %ebp ; CHECK32-NEXT: setns %bl ; CHECK32-NEXT: addl $2147483647, %ebx # imm = 0x7FFFFFFF ; CHECK32-NEXT: subl %eax, %edi ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax ; CHECK32-NEXT: cmovol %ebx, %edi ; CHECK32-NEXT: movl %ecx, 12(%eax) ; CHECK32-NEXT: movl %edx, 8(%eax) ; CHECK32-NEXT: movl %esi, 4(%eax) ; CHECK32-NEXT: movl %edi, (%eax) ; CHECK32-NEXT: popl %esi ; CHECK32-NEXT: .cfi_def_cfa_offset 16 ; CHECK32-NEXT: popl %edi ; CHECK32-NEXT: .cfi_def_cfa_offset 12 ; CHECK32-NEXT: popl %ebx ; CHECK32-NEXT: .cfi_def_cfa_offset 8 ; CHECK32-NEXT: popl %ebp ; CHECK32-NEXT: .cfi_def_cfa_offset 4 ; CHECK32-NEXT: retl $4 %tmp = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y); ret <4 x i32> %tmp; }