# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s

--- |
  ; ModuleID = 'sdiv.ll'
  source_filename = "sdiv.ll"
  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

  define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) {
    %res = sdiv i8 %arg1, %arg2
    ret i8 %res
  }

  define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) {
    %res = sdiv i16 %arg1, %arg2
    ret i16 %res
  }

  define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) {
    %res = sdiv i32 %arg1, %arg2
    ret i32 %res
  }

  define i64 @test_sdiv_i64(i64 %arg1, i64 %arg2) {
    %res = sdiv i64 %arg1, %arg2
    ret i64 %res
  }

...
---
name:            test_sdiv_i8
alignment:       4
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
  - { id: 4, class: _ }
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i8
    ; CHECK: liveins: $edi, $esi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
    ; CHECK: [[SDIV:%[0-9]+]]:_(s8) = G_SDIV [[TRUNC]], [[TRUNC1]]
    ; CHECK: $al = COPY [[SDIV]](s8)
    ; CHECK: RET 0, implicit $al
    %2:_(s32) = COPY $edi
    %0:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $esi
    %1:_(s8) = G_TRUNC %3(s32)
    %4:_(s8) = G_SDIV %0, %1
    $al = COPY %4(s8)
    RET 0, implicit $al

...
---
name:            test_sdiv_i16
alignment:       4
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
  - { id: 4, class: _ }
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i16
    ; CHECK: liveins: $edi, $esi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
    ; CHECK: [[SDIV:%[0-9]+]]:_(s16) = G_SDIV [[TRUNC]], [[TRUNC1]]
    ; CHECK: $ax = COPY [[SDIV]](s16)
    ; CHECK: RET 0, implicit $ax
    %2:_(s32) = COPY $edi
    %0:_(s16) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $esi
    %1:_(s16) = G_TRUNC %3(s32)
    %4:_(s16) = G_SDIV %0, %1
    $ax = COPY %4(s16)
    RET 0, implicit $ax

...
---
name:            test_sdiv_i32
alignment:       4
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1 (%ir-block.0):
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i32
    ; CHECK: liveins: $edi, $esi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[COPY1]]
    ; CHECK: $eax = COPY [[SDIV]](s32)
    ; CHECK: RET 0, implicit $eax
    %0:_(s32) = COPY $edi
    %1:_(s32) = COPY $esi
    %2:_(s32) = G_SDIV %0, %1
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_sdiv_i64
alignment:       4
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1 (%ir-block.0):
    liveins: $rdi, $rsi

    ; CHECK-LABEL: name: test_sdiv_i64
    ; CHECK: liveins: $rdi, $rsi
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
    ; CHECK: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[COPY]], [[COPY1]]
    ; CHECK: $rax = COPY [[SDIV]](s64)
    ; CHECK: RET 0, implicit $rax
    %0:_(s64) = COPY $rdi
    %1:_(s64) = COPY $rsi
    %2:_(s64) = G_SDIV %0, %1
    $rax = COPY %2(s64)
    RET 0, implicit $rax

...