# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --- | define i1 @trunc_i32toi1(i32 %a) { %r = trunc i32 %a to i1 ret i1 %r } define i8 @trunc_i32toi8(i32 %a) { %r = trunc i32 %a to i8 ret i8 %r } define i16 @trunc_i32toi16(i32 %a) { %r = trunc i32 %a to i16 ret i16 %r } define i8 @trunc_i64toi8(i64 %a) { %r = trunc i64 %a to i8 ret i8 %r } define i16 @trunc_i64toi16(i64 %a) { %r = trunc i64 %a to i16 ret i16 %r } define i32 @trunc_i64toi32(i64 %a) { %r = trunc i64 %a to i32 ret i32 %r } ... --- name: trunc_i32toi1 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } - { id: 2, class: gpr } body: | bb.1 (%ir-block.0): liveins: $edi ; CHECK-LABEL: name: trunc_i32toi1 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit ; CHECK: $al = COPY [[COPY1]] ; CHECK: RET 0, implicit $al %0(s32) = COPY $edi %1(s1) = G_TRUNC %0(s32) %2(s8) = G_ANYEXT %1(s1) $al = COPY %2(s8) RET 0, implicit $al ... --- name: trunc_i32toi8 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } body: | bb.1 (%ir-block.0): liveins: $edi ; CHECK-LABEL: name: trunc_i32toi8 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit ; CHECK: $al = COPY [[COPY1]] ; CHECK: RET 0, implicit $al %0(s32) = COPY $edi %1(s8) = G_TRUNC %0(s32) $al = COPY %1(s8) RET 0, implicit $al ... --- name: trunc_i32toi16 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } body: | bb.1 (%ir-block.0): liveins: $edi ; CHECK-LABEL: name: trunc_i32toi16 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit ; CHECK: $ax = COPY [[COPY1]] ; CHECK: RET 0, implicit $ax %0(s32) = COPY $edi %1(s16) = G_TRUNC %0(s32) $ax = COPY %1(s16) RET 0, implicit $ax ... --- name: trunc_i64toi8 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } body: | bb.1 (%ir-block.0): liveins: $rdi ; CHECK-LABEL: name: trunc_i64toi8 ; CHECK: [[COPY:%[0-9]+]]:gr64_with_sub_8bit = COPY $rdi ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit ; CHECK: $al = COPY [[COPY1]] ; CHECK: RET 0, implicit $al %0(s64) = COPY $rdi %1(s8) = G_TRUNC %0(s64) $al = COPY %1(s8) RET 0, implicit $al ... --- name: trunc_i64toi16 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } body: | bb.1 (%ir-block.0): liveins: $rdi ; CHECK-LABEL: name: trunc_i64toi16 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit ; CHECK: $ax = COPY [[COPY1]] ; CHECK: RET 0, implicit $ax %0(s64) = COPY $rdi %1(s16) = G_TRUNC %0(s64) $ax = COPY %1(s16) RET 0, implicit $ax ... --- name: trunc_i64toi32 alignment: 16 legalized: true regBankSelected: true registers: - { id: 0, class: gpr } - { id: 1, class: gpr } body: | bb.1 (%ir-block.0): liveins: $rdi ; CHECK-LABEL: name: trunc_i64toi32 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]].sub_32bit ; CHECK: $eax = COPY [[COPY1]] ; CHECK: RET 0, implicit $eax %0(s64) = COPY $rdi %1(s32) = G_TRUNC %0(s64) $eax = COPY %1(s32) RET 0, implicit $eax ...