# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --- name: cmp_imm_32 legalized: true regBankSelected: true tracksRegLiveness: true body: | bb.1: liveins: $w0 ; CHECK-LABEL: name: cmp_imm_32 ; CHECK: liveins: $w0 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0 ; CHECK: $wzr = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv ; CHECK: $w0 = COPY [[CSINCWr]] ; CHECK: RET_ReallyLR implicit $w0 %0:gpr(s32) = COPY $w0 %1:gpr(s32) = G_CONSTANT i32 42 %5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %1 $w0 = COPY %5(s32) RET_ReallyLR implicit $w0 ... --- name: cmp_imm_64 legalized: true regBankSelected: true tracksRegLiveness: true body: | bb.1: liveins: $x0 ; CHECK-LABEL: name: cmp_imm_64 ; CHECK: liveins: $x0 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 ; CHECK: $xzr = SUBSXri [[COPY]], 42, 0, implicit-def $nzcv ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv ; CHECK: $w0 = COPY [[CSINCWr]] ; CHECK: RET_ReallyLR implicit $w0 %0:gpr(s64) = COPY $x0 %1:gpr(s64) = G_CONSTANT i64 42 %5:gpr(s32) = G_ICMP intpred(eq), %0(s64), %1 $w0 = COPY %5(s32) RET_ReallyLR implicit $w0 ... --- name: cmp_imm_out_of_range legalized: true regBankSelected: true tracksRegLiveness: true body: | bb.1: liveins: $x0 ; CHECK-LABEL: name: cmp_imm_out_of_range ; CHECK: liveins: $x0 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 13132 ; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32 ; CHECK: $xzr = SUBSXrr [[COPY]], [[SUBREG_TO_REG]], implicit-def $nzcv ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv ; CHECK: $w0 = COPY [[CSINCWr]] ; CHECK: RET_ReallyLR implicit $w0 %0:gpr(s64) = COPY $x0 %1:gpr(s64) = G_CONSTANT i64 13132 %5:gpr(s32) = G_ICMP intpred(eq), %0(s64), %1 $w0 = COPY %5(s32) RET_ReallyLR implicit $w0 ... --- name: cmp_imm_lookthrough legalized: true regBankSelected: true tracksRegLiveness: true body: | bb.1: liveins: $w0 ; CHECK-LABEL: name: cmp_imm_lookthrough ; CHECK: liveins: $w0 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0 ; CHECK: $wzr = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv ; CHECK: $w0 = COPY [[CSINCWr]] ; CHECK: RET_ReallyLR implicit $w0 %0:gpr(s32) = COPY $w0 %1:gpr(s64) = G_CONSTANT i64 42 %2:gpr(s32) = G_TRUNC %1(s64) %5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2 $w0 = COPY %5(s32) RET_ReallyLR implicit $w0 ... --- name: cmp_imm_lookthrough_bad_trunc legalized: true regBankSelected: true tracksRegLiveness: true body: | bb.1: liveins: $w0 ; CHECK-LABEL: name: cmp_imm_lookthrough_bad_trunc ; CHECK: liveins: $w0 ; CHECK: [[COPY:%[0-9]+]]:gpr32sp = COPY $w0 ; CHECK: $wzr = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv ; CHECK: $w0 = COPY [[CSINCWr]] ; CHECK: RET_ReallyLR implicit $w0 %0:gpr(s32) = COPY $w0 %1:gpr(s64) = G_CONSTANT i64 68719476736 ; 0x1000000000 %2:gpr(s32) = G_TRUNC %1(s64) ; Value truncates to 0 %5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2 $w0 = COPY %5(s32) RET_ReallyLR implicit $w0