//===-- XCoreInstPrinter.cpp - Convert XCore MCInst to assembly syntax ----===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This class prints an XCore MCInst to a .s file. // //===----------------------------------------------------------------------===// #include "XCoreInstPrinter.h" #include "llvm/ADT/StringRef.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/Casting.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" #include using namespace llvm; #define DEBUG_TYPE "asm-printer" #include "XCoreGenAsmWriter.inc" void XCoreInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { OS << StringRef(getRegisterName(RegNo)).lower(); } void XCoreInstPrinter::printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) { printInstruction(MI, Address, O); printAnnotation(O, Annot); } void XCoreInstPrinter:: printInlineJT(const MCInst *MI, int opNum, raw_ostream &O) { report_fatal_error("can't handle InlineJT"); } void XCoreInstPrinter:: printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O) { report_fatal_error("can't handle InlineJT32"); } static void printExpr(const MCExpr *Expr, const MCAsmInfo *MAI, raw_ostream &OS) { int Offset = 0; const MCSymbolRefExpr *SRE; if (const MCBinaryExpr *BE = dyn_cast(Expr)) { SRE = dyn_cast(BE->getLHS()); const MCConstantExpr *CE = dyn_cast(BE->getRHS()); assert(SRE && CE && "Binary expression must be sym+const."); Offset = CE->getValue(); } else { SRE = dyn_cast(Expr); assert(SRE && "Unexpected MCExpr type."); } assert(SRE->getKind() == MCSymbolRefExpr::VK_None); SRE->getSymbol().print(OS, MAI); if (Offset) { if (Offset > 0) OS << '+'; OS << Offset; } } void XCoreInstPrinter:: printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { printRegName(O, Op.getReg()); return; } if (Op.isImm()) { O << Op.getImm(); return; } assert(Op.isExpr() && "unknown operand kind in printOperand"); printExpr(Op.getExpr(), &MAI, O); }