let Namespace = "AMDGPU" in {
  def low : SubRegIndex;
  def high : SubRegIndex;

  def sub0 : SubRegIndex;
  def sub1 : SubRegIndex;
  def sub2 : SubRegIndex;
  def sub3 : SubRegIndex;
  def sub4 : SubRegIndex;
  def sub5 : SubRegIndex;
  def sub6 : SubRegIndex;
  def sub7 : SubRegIndex;
}

class SIReg <string n, bits<16> encoding = 0> : Register<n> {
  let Namespace = "AMDGPU";
  let HWEncoding = encoding;
}

class SI_64 <string n, list<Register> subregs, bits<16> encoding> : RegisterWithSubRegs<n, subregs> {
  let Namespace = "AMDGPU";
  let SubRegIndices = [low, high];
  let HWEncoding = encoding;
}

class SI_128 <string n, list<Register> subregs, bits<16> encoding> : RegisterWithSubRegs<n, subregs> {
  let Namespace = "AMDGPU";
  let SubRegIndices = [sel_x, sel_y, sel_z, sel_w];
  let HWEncoding = encoding;
}

class SI_256 <string n, list<Register> subregs, bits<16> encoding> : RegisterWithSubRegs<n, subregs> {
  let Namespace = "AMDGPU";
  let SubRegIndices = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
  let HWEncoding = encoding;
}

class SGPR_32 <bits<16> num, string name> : SIReg<name, num>;

class VGPR_32 <bits<16> num, string name> : SIReg<name, num>;

class SGPR_64 <bits<16> num, string name, list<Register> subregs> :
    SI_64 <name, subregs, num>;

class VGPR_64 <bits<16> num, string name, list<Register> subregs> :
    SI_64 <name, subregs, num>;

class SGPR_128 <bits<16> num, string name, list<Register> subregs> :
    SI_128 <name, subregs, num>;

class VGPR_128 <bits<16> num, string name, list<Register> subregs> :
    SI_128 <name, subregs, num>;

class SGPR_256 <bits<16> num, string name, list<Register> subregs> :
    SI_256 <name, subregs, num>;

def VCC : SIReg<"VCC">;
def SCC : SIReg<"SCC">;
def SREG_LIT_0 : SIReg <"S LIT 0", 128>;

def M0 : SIReg <"M0", 124>;

//Interpolation registers

def PERSP_SAMPLE_I : SIReg <"PERSP_SAMPLE_I">;
def PERSP_SAMPLE_J : SIReg <"PERSP_SAMPLE_J">;
def PERSP_CENTER_I : SIReg <"PERSP_CENTER_I">;
def PERSP_CENTER_J : SIReg <"PERSP_CENTER_J">;
def PERSP_CENTROID_I : SIReg <"PERSP_CENTROID_I">;
def PERSP_CENTROID_J : SIReg <"PERP_CENTROID_J">;
def PERSP_I_W : SIReg <"PERSP_I_W">;
def PERSP_J_W : SIReg <"PERSP_J_W">;
def PERSP_1_W : SIReg <"PERSP_1_W">;
def LINEAR_SAMPLE_I : SIReg <"LINEAR_SAMPLE_I">;
def LINEAR_SAMPLE_J : SIReg <"LINEAR_SAMPLE_J">;
def LINEAR_CENTER_I : SIReg <"LINEAR_CENTER_I">;
def LINEAR_CENTER_J : SIReg <"LINEAR_CENTER_J">;
def LINEAR_CENTROID_I : SIReg <"LINEAR_CENTROID_I">;
def LINEAR_CENTROID_J : SIReg <"LINEAR_CENTROID_J">;
def LINE_STIPPLE_TEX_COORD : SIReg <"LINE_STIPPLE_TEX_COORD">;
def POS_X_FLOAT : SIReg <"POS_X_FLOAT">;
def POS_Y_FLOAT : SIReg <"POS_Y_FLOAT">;
def POS_Z_FLOAT : SIReg <"POS_Z_FLOAT">;
def POS_W_FLOAT : SIReg <"POS_W_FLOAT">;
def FRONT_FACE : SIReg <"FRONT_FACE">;
def ANCILLARY : SIReg <"ANCILLARY">;
def SAMPLE_COVERAGE : SIReg <"SAMPLE_COVERAGE">;
def POS_FIXED_PT : SIReg <"POS_FIXED_PT">;

def SGPR0 : SGPR_32 <0, "SGPR0">;
def SGPR1 : SGPR_32 <1, "SGPR1">;
def SGPR2 : SGPR_32 <2, "SGPR2">;
def SGPR3 : SGPR_32 <3, "SGPR3">;
def SGPR4 : SGPR_32 <4, "SGPR4">;
def SGPR5 : SGPR_32 <5, "SGPR5">;
def SGPR6 : SGPR_32 <6, "SGPR6">;
def SGPR7 : SGPR_32 <7, "SGPR7">;
def SGPR8 : SGPR_32 <8, "SGPR8">;
def SGPR9 : SGPR_32 <9, "SGPR9">;
def SGPR10 : SGPR_32 <10, "SGPR10">;
def SGPR11 : SGPR_32 <11, "SGPR11">;
def SGPR12 : SGPR_32 <12, "SGPR12">;
def SGPR13 : SGPR_32 <13, "SGPR13">;
def SGPR14 : SGPR_32 <14, "SGPR14">;
def SGPR15 : SGPR_32 <15, "SGPR15">;
def SGPR16 : SGPR_32 <16, "SGPR16">;
def SGPR17 : SGPR_32 <17, "SGPR17">;
def SGPR18 : SGPR_32 <18, "SGPR18">;
def SGPR19 : SGPR_32 <19, "SGPR19">;
def SGPR20 : SGPR_32 <20, "SGPR20">;
def SGPR21 : SGPR_32 <21, "SGPR21">;
def SGPR22 : SGPR_32 <22, "SGPR22">;
def SGPR23 : SGPR_32 <23, "SGPR23">;
def SGPR24 : SGPR_32 <24, "SGPR24">;
def SGPR25 : SGPR_32 <25, "SGPR25">;
def SGPR26 : SGPR_32 <26, "SGPR26">;
def SGPR27 : SGPR_32 <27, "SGPR27">;
def SGPR28 : SGPR_32 <28, "SGPR28">;
def SGPR29 : SGPR_32 <29, "SGPR29">;
def SGPR30 : SGPR_32 <30, "SGPR30">;
def SGPR31 : SGPR_32 <31, "SGPR31">;
def SGPR32 : SGPR_32 <32, "SGPR32">;
def SGPR33 : SGPR_32 <33, "SGPR33">;
def SGPR34 : SGPR_32 <34, "SGPR34">;
def SGPR35 : SGPR_32 <35, "SGPR35">;
def SGPR36 : SGPR_32 <36, "SGPR36">;
def SGPR37 : SGPR_32 <37, "SGPR37">;
def SGPR38 : SGPR_32 <38, "SGPR38">;
def SGPR39 : SGPR_32 <39, "SGPR39">;
def SGPR40 : SGPR_32 <40, "SGPR40">;
def SGPR41 : SGPR_32 <41, "SGPR41">;
def SGPR42 : SGPR_32 <42, "SGPR42">;
def SGPR43 : SGPR_32 <43, "SGPR43">;
def SGPR44 : SGPR_32 <44, "SGPR44">;
def SGPR45 : SGPR_32 <45, "SGPR45">;
def SGPR46 : SGPR_32 <46, "SGPR46">;
def SGPR47 : SGPR_32 <47, "SGPR47">;
def SGPR48 : SGPR_32 <48, "SGPR48">;
def SGPR49 : SGPR_32 <49, "SGPR49">;
def SGPR50 : SGPR_32 <50, "SGPR50">;
def SGPR51 : SGPR_32 <51, "SGPR51">;
def SGPR52 : SGPR_32 <52, "SGPR52">;
def SGPR53 : SGPR_32 <53, "SGPR53">;
def SGPR54 : SGPR_32 <54, "SGPR54">;
def SGPR55 : SGPR_32 <55, "SGPR55">;
def SGPR56 : SGPR_32 <56, "SGPR56">;
def SGPR57 : SGPR_32 <57, "SGPR57">;
def SGPR58 : SGPR_32 <58, "SGPR58">;
def SGPR59 : SGPR_32 <59, "SGPR59">;
def SGPR60 : SGPR_32 <60, "SGPR60">;
def SGPR61 : SGPR_32 <61, "SGPR61">;
def SGPR62 : SGPR_32 <62, "SGPR62">;
def SGPR63 : SGPR_32 <63, "SGPR63">;
def SGPR64 : SGPR_32 <64, "SGPR64">;
def SGPR65 : SGPR_32 <65, "SGPR65">;
def SGPR66 : SGPR_32 <66, "SGPR66">;
def SGPR67 : SGPR_32 <67, "SGPR67">;
def SGPR68 : SGPR_32 <68, "SGPR68">;
def SGPR69 : SGPR_32 <69, "SGPR69">;
def SGPR70 : SGPR_32 <70, "SGPR70">;
def SGPR71 : SGPR_32 <71, "SGPR71">;
def SGPR72 : SGPR_32 <72, "SGPR72">;
def SGPR73 : SGPR_32 <73, "SGPR73">;
def SGPR74 : SGPR_32 <74, "SGPR74">;
def SGPR75 : SGPR_32 <75, "SGPR75">;
def SGPR76 : SGPR_32 <76, "SGPR76">;
def SGPR77 : SGPR_32 <77, "SGPR77">;
def SGPR78 : SGPR_32 <78, "SGPR78">;
def SGPR79 : SGPR_32 <79, "SGPR79">;
def SGPR80 : SGPR_32 <80, "SGPR80">;
def SGPR81 : SGPR_32 <81, "SGPR81">;
def SGPR82 : SGPR_32 <82, "SGPR82">;
def SGPR83 : SGPR_32 <83, "SGPR83">;
def SGPR84 : SGPR_32 <84, "SGPR84">;
def SGPR85 : SGPR_32 <85, "SGPR85">;
def SGPR86 : SGPR_32 <86, "SGPR86">;
def SGPR87 : SGPR_32 <87, "SGPR87">;
def SGPR88 : SGPR_32 <88, "SGPR88">;
def SGPR89 : SGPR_32 <89, "SGPR89">;
def SGPR90 : SGPR_32 <90, "SGPR90">;
def SGPR91 : SGPR_32 <91, "SGPR91">;
def SGPR92 : SGPR_32 <92, "SGPR92">;
def SGPR93 : SGPR_32 <93, "SGPR93">;
def SGPR94 : SGPR_32 <94, "SGPR94">;
def SGPR95 : SGPR_32 <95, "SGPR95">;
def SGPR96 : SGPR_32 <96, "SGPR96">;
def SGPR97 : SGPR_32 <97, "SGPR97">;
def SGPR98 : SGPR_32 <98, "SGPR98">;
def SGPR99 : SGPR_32 <99, "SGPR99">;
def SGPR100 : SGPR_32 <100, "SGPR100">;
def SGPR101 : SGPR_32 <101, "SGPR101">;
def SGPR102 : SGPR_32 <102, "SGPR102">;
def SGPR103 : SGPR_32 <103, "SGPR103">;
def VGPR0 : VGPR_32 <0, "VGPR0">;
def VGPR1 : VGPR_32 <1, "VGPR1">;
def VGPR2 : VGPR_32 <2, "VGPR2">;
def VGPR3 : VGPR_32 <3, "VGPR3">;
def VGPR4 : VGPR_32 <4, "VGPR4">;
def VGPR5 : VGPR_32 <5, "VGPR5">;
def VGPR6 : VGPR_32 <6, "VGPR6">;
def VGPR7 : VGPR_32 <7, "VGPR7">;
def VGPR8 : VGPR_32 <8, "VGPR8">;
def VGPR9 : VGPR_32 <9, "VGPR9">;
def VGPR10 : VGPR_32 <10, "VGPR10">;
def VGPR11 : VGPR_32 <11, "VGPR11">;
def VGPR12 : VGPR_32 <12, "VGPR12">;
def VGPR13 : VGPR_32 <13, "VGPR13">;
def VGPR14 : VGPR_32 <14, "VGPR14">;
def VGPR15 : VGPR_32 <15, "VGPR15">;
def VGPR16 : VGPR_32 <16, "VGPR16">;
def VGPR17 : VGPR_32 <17, "VGPR17">;
def VGPR18 : VGPR_32 <18, "VGPR18">;
def VGPR19 : VGPR_32 <19, "VGPR19">;
def VGPR20 : VGPR_32 <20, "VGPR20">;
def VGPR21 : VGPR_32 <21, "VGPR21">;
def VGPR22 : VGPR_32 <22, "VGPR22">;
def VGPR23 : VGPR_32 <23, "VGPR23">;
def VGPR24 : VGPR_32 <24, "VGPR24">;
def VGPR25 : VGPR_32 <25, "VGPR25">;
def VGPR26 : VGPR_32 <26, "VGPR26">;
def VGPR27 : VGPR_32 <27, "VGPR27">;
def VGPR28 : VGPR_32 <28, "VGPR28">;
def VGPR29 : VGPR_32 <29, "VGPR29">;
def VGPR30 : VGPR_32 <30, "VGPR30">;
def VGPR31 : VGPR_32 <31, "VGPR31">;
def VGPR32 : VGPR_32 <32, "VGPR32">;
def VGPR33 : VGPR_32 <33, "VGPR33">;
def VGPR34 : VGPR_32 <34, "VGPR34">;
def VGPR35 : VGPR_32 <35, "VGPR35">;
def VGPR36 : VGPR_32 <36, "VGPR36">;
def VGPR37 : VGPR_32 <37, "VGPR37">;
def VGPR38 : VGPR_32 <38, "VGPR38">;
def VGPR39 : VGPR_32 <39, "VGPR39">;
def VGPR40 : VGPR_32 <40, "VGPR40">;
def VGPR41 : VGPR_32 <41, "VGPR41">;
def VGPR42 : VGPR_32 <42, "VGPR42">;
def VGPR43 : VGPR_32 <43, "VGPR43">;
def VGPR44 : VGPR_32 <44, "VGPR44">;
def VGPR45 : VGPR_32 <45, "VGPR45">;
def VGPR46 : VGPR_32 <46, "VGPR46">;
def VGPR47 : VGPR_32 <47, "VGPR47">;
def VGPR48 : VGPR_32 <48, "VGPR48">;
def VGPR49 : VGPR_32 <49, "VGPR49">;
def VGPR50 : VGPR_32 <50, "VGPR50">;
def VGPR51 : VGPR_32 <51, "VGPR51">;
def VGPR52 : VGPR_32 <52, "VGPR52">;
def VGPR53 : VGPR_32 <53, "VGPR53">;
def VGPR54 : VGPR_32 <54, "VGPR54">;
def VGPR55 : VGPR_32 <55, "VGPR55">;
def VGPR56 : VGPR_32 <56, "VGPR56">;
def VGPR57 : VGPR_32 <57, "VGPR57">;
def VGPR58 : VGPR_32 <58, "VGPR58">;
def VGPR59 : VGPR_32 <59, "VGPR59">;
def VGPR60 : VGPR_32 <60, "VGPR60">;
def VGPR61 : VGPR_32 <61, "VGPR61">;
def VGPR62 : VGPR_32 <62, "VGPR62">;
def VGPR63 : VGPR_32 <63, "VGPR63">;
def VGPR64 : VGPR_32 <64, "VGPR64">;
def VGPR65 : VGPR_32 <65, "VGPR65">;
def VGPR66 : VGPR_32 <66, "VGPR66">;
def VGPR67 : VGPR_32 <67, "VGPR67">;
def VGPR68 : VGPR_32 <68, "VGPR68">;
def VGPR69 : VGPR_32 <69, "VGPR69">;
def VGPR70 : VGPR_32 <70, "VGPR70">;
def VGPR71 : VGPR_32 <71, "VGPR71">;
def VGPR72 : VGPR_32 <72, "VGPR72">;
def VGPR73 : VGPR_32 <73, "VGPR73">;
def VGPR74 : VGPR_32 <74, "VGPR74">;
def VGPR75 : VGPR_32 <75, "VGPR75">;
def VGPR76 : VGPR_32 <76, "VGPR76">;
def VGPR77 : VGPR_32 <77, "VGPR77">;
def VGPR78 : VGPR_32 <78, "VGPR78">;
def VGPR79 : VGPR_32 <79, "VGPR79">;
def VGPR80 : VGPR_32 <80, "VGPR80">;
def VGPR81 : VGPR_32 <81, "VGPR81">;
def VGPR82 : VGPR_32 <82, "VGPR82">;
def VGPR83 : VGPR_32 <83, "VGPR83">;
def VGPR84 : VGPR_32 <84, "VGPR84">;
def VGPR85 : VGPR_32 <85, "VGPR85">;
def VGPR86 : VGPR_32 <86, "VGPR86">;
def VGPR87 : VGPR_32 <87, "VGPR87">;
def VGPR88 : VGPR_32 <88, "VGPR88">;
def VGPR89 : VGPR_32 <89, "VGPR89">;
def VGPR90 : VGPR_32 <90, "VGPR90">;
def VGPR91 : VGPR_32 <91, "VGPR91">;
def VGPR92 : VGPR_32 <92, "VGPR92">;
def VGPR93 : VGPR_32 <93, "VGPR93">;
def VGPR94 : VGPR_32 <94, "VGPR94">;
def VGPR95 : VGPR_32 <95, "VGPR95">;
def VGPR96 : VGPR_32 <96, "VGPR96">;
def VGPR97 : VGPR_32 <97, "VGPR97">;
def VGPR98 : VGPR_32 <98, "VGPR98">;
def VGPR99 : VGPR_32 <99, "VGPR99">;
def VGPR100 : VGPR_32 <100, "VGPR100">;
def VGPR101 : VGPR_32 <101, "VGPR101">;
def VGPR102 : VGPR_32 <102, "VGPR102">;
def VGPR103 : VGPR_32 <103, "VGPR103">;
def VGPR104 : VGPR_32 <104, "VGPR104">;
def VGPR105 : VGPR_32 <105, "VGPR105">;
def VGPR106 : VGPR_32 <106, "VGPR106">;
def VGPR107 : VGPR_32 <107, "VGPR107">;
def VGPR108 : VGPR_32 <108, "VGPR108">;
def VGPR109 : VGPR_32 <109, "VGPR109">;
def VGPR110 : VGPR_32 <110, "VGPR110">;
def VGPR111 : VGPR_32 <111, "VGPR111">;
def VGPR112 : VGPR_32 <112, "VGPR112">;
def VGPR113 : VGPR_32 <113, "VGPR113">;
def VGPR114 : VGPR_32 <114, "VGPR114">;
def VGPR115 : VGPR_32 <115, "VGPR115">;
def VGPR116 : VGPR_32 <116, "VGPR116">;
def VGPR117 : VGPR_32 <117, "VGPR117">;
def VGPR118 : VGPR_32 <118, "VGPR118">;
def VGPR119 : VGPR_32 <119, "VGPR119">;
def VGPR120 : VGPR_32 <120, "VGPR120">;
def VGPR121 : VGPR_32 <121, "VGPR121">;
def VGPR122 : VGPR_32 <122, "VGPR122">;
def VGPR123 : VGPR_32 <123, "VGPR123">;
def VGPR124 : VGPR_32 <124, "VGPR124">;
def VGPR125 : VGPR_32 <125, "VGPR125">;
def VGPR126 : VGPR_32 <126, "VGPR126">;
def VGPR127 : VGPR_32 <127, "VGPR127">;
def VGPR128 : VGPR_32 <128, "VGPR128">;
def VGPR129 : VGPR_32 <129, "VGPR129">;
def VGPR130 : VGPR_32 <130, "VGPR130">;
def VGPR131 : VGPR_32 <131, "VGPR131">;
def VGPR132 : VGPR_32 <132, "VGPR132">;
def VGPR133 : VGPR_32 <133, "VGPR133">;
def VGPR134 : VGPR_32 <134, "VGPR134">;
def VGPR135 : VGPR_32 <135, "VGPR135">;
def VGPR136 : VGPR_32 <136, "VGPR136">;
def VGPR137 : VGPR_32 <137, "VGPR137">;
def VGPR138 : VGPR_32 <138, "VGPR138">;
def VGPR139 : VGPR_32 <139, "VGPR139">;
def VGPR140 : VGPR_32 <140, "VGPR140">;
def VGPR141 : VGPR_32 <141, "VGPR141">;
def VGPR142 : VGPR_32 <142, "VGPR142">;
def VGPR143 : VGPR_32 <143, "VGPR143">;
def VGPR144 : VGPR_32 <144, "VGPR144">;
def VGPR145 : VGPR_32 <145, "VGPR145">;
def VGPR146 : VGPR_32 <146, "VGPR146">;
def VGPR147 : VGPR_32 <147, "VGPR147">;
def VGPR148 : VGPR_32 <148, "VGPR148">;
def VGPR149 : VGPR_32 <149, "VGPR149">;
def VGPR150 : VGPR_32 <150, "VGPR150">;
def VGPR151 : VGPR_32 <151, "VGPR151">;
def VGPR152 : VGPR_32 <152, "VGPR152">;
def VGPR153 : VGPR_32 <153, "VGPR153">;
def VGPR154 : VGPR_32 <154, "VGPR154">;
def VGPR155 : VGPR_32 <155, "VGPR155">;
def VGPR156 : VGPR_32 <156, "VGPR156">;
def VGPR157 : VGPR_32 <157, "VGPR157">;
def VGPR158 : VGPR_32 <158, "VGPR158">;
def VGPR159 : VGPR_32 <159, "VGPR159">;
def VGPR160 : VGPR_32 <160, "VGPR160">;
def VGPR161 : VGPR_32 <161, "VGPR161">;
def VGPR162 : VGPR_32 <162, "VGPR162">;
def VGPR163 : VGPR_32 <163, "VGPR163">;
def VGPR164 : VGPR_32 <164, "VGPR164">;
def VGPR165 : VGPR_32 <165, "VGPR165">;
def VGPR166 : VGPR_32 <166, "VGPR166">;
def VGPR167 : VGPR_32 <167, "VGPR167">;
def VGPR168 : VGPR_32 <168, "VGPR168">;
def VGPR169 : VGPR_32 <169, "VGPR169">;
def VGPR170 : VGPR_32 <170, "VGPR170">;
def VGPR171 : VGPR_32 <171, "VGPR171">;
def VGPR172 : VGPR_32 <172, "VGPR172">;
def VGPR173 : VGPR_32 <173, "VGPR173">;
def VGPR174 : VGPR_32 <174, "VGPR174">;
def VGPR175 : VGPR_32 <175, "VGPR175">;
def VGPR176 : VGPR_32 <176, "VGPR176">;
def VGPR177 : VGPR_32 <177, "VGPR177">;
def VGPR178 : VGPR_32 <178, "VGPR178">;
def VGPR179 : VGPR_32 <179, "VGPR179">;
def VGPR180 : VGPR_32 <180, "VGPR180">;
def VGPR181 : VGPR_32 <181, "VGPR181">;
def VGPR182 : VGPR_32 <182, "VGPR182">;
def VGPR183 : VGPR_32 <183, "VGPR183">;
def VGPR184 : VGPR_32 <184, "VGPR184">;
def VGPR185 : VGPR_32 <185, "VGPR185">;
def VGPR186 : VGPR_32 <186, "VGPR186">;
def VGPR187 : VGPR_32 <187, "VGPR187">;
def VGPR188 : VGPR_32 <188, "VGPR188">;
def VGPR189 : VGPR_32 <189, "VGPR189">;
def VGPR190 : VGPR_32 <190, "VGPR190">;
def VGPR191 : VGPR_32 <191, "VGPR191">;
def VGPR192 : VGPR_32 <192, "VGPR192">;
def VGPR193 : VGPR_32 <193, "VGPR193">;
def VGPR194 : VGPR_32 <194, "VGPR194">;
def VGPR195 : VGPR_32 <195, "VGPR195">;
def VGPR196 : VGPR_32 <196, "VGPR196">;
def VGPR197 : VGPR_32 <197, "VGPR197">;
def VGPR198 : VGPR_32 <198, "VGPR198">;
def VGPR199 : VGPR_32 <199, "VGPR199">;
def VGPR200 : VGPR_32 <200, "VGPR200">;
def VGPR201 : VGPR_32 <201, "VGPR201">;
def VGPR202 : VGPR_32 <202, "VGPR202">;
def VGPR203 : VGPR_32 <203, "VGPR203">;
def VGPR204 : VGPR_32 <204, "VGPR204">;
def VGPR205 : VGPR_32 <205, "VGPR205">;
def VGPR206 : VGPR_32 <206, "VGPR206">;
def VGPR207 : VGPR_32 <207, "VGPR207">;
def VGPR208 : VGPR_32 <208, "VGPR208">;
def VGPR209 : VGPR_32 <209, "VGPR209">;
def VGPR210 : VGPR_32 <210, "VGPR210">;
def VGPR211 : VGPR_32 <211, "VGPR211">;
def VGPR212 : VGPR_32 <212, "VGPR212">;
def VGPR213 : VGPR_32 <213, "VGPR213">;
def VGPR214 : VGPR_32 <214, "VGPR214">;
def VGPR215 : VGPR_32 <215, "VGPR215">;
def VGPR216 : VGPR_32 <216, "VGPR216">;
def VGPR217 : VGPR_32 <217, "VGPR217">;
def VGPR218 : VGPR_32 <218, "VGPR218">;
def VGPR219 : VGPR_32 <219, "VGPR219">;
def VGPR220 : VGPR_32 <220, "VGPR220">;
def VGPR221 : VGPR_32 <221, "VGPR221">;
def VGPR222 : VGPR_32 <222, "VGPR222">;
def VGPR223 : VGPR_32 <223, "VGPR223">;
def VGPR224 : VGPR_32 <224, "VGPR224">;
def VGPR225 : VGPR_32 <225, "VGPR225">;
def VGPR226 : VGPR_32 <226, "VGPR226">;
def VGPR227 : VGPR_32 <227, "VGPR227">;
def VGPR228 : VGPR_32 <228, "VGPR228">;
def VGPR229 : VGPR_32 <229, "VGPR229">;
def VGPR230 : VGPR_32 <230, "VGPR230">;
def VGPR231 : VGPR_32 <231, "VGPR231">;
def VGPR232 : VGPR_32 <232, "VGPR232">;
def VGPR233 : VGPR_32 <233, "VGPR233">;
def VGPR234 : VGPR_32 <234, "VGPR234">;
def VGPR235 : VGPR_32 <235, "VGPR235">;
def VGPR236 : VGPR_32 <236, "VGPR236">;
def VGPR237 : VGPR_32 <237, "VGPR237">;
def VGPR238 : VGPR_32 <238, "VGPR238">;
def VGPR239 : VGPR_32 <239, "VGPR239">;
def VGPR240 : VGPR_32 <240, "VGPR240">;
def VGPR241 : VGPR_32 <241, "VGPR241">;
def VGPR242 : VGPR_32 <242, "VGPR242">;
def VGPR243 : VGPR_32 <243, "VGPR243">;
def VGPR244 : VGPR_32 <244, "VGPR244">;
def VGPR245 : VGPR_32 <245, "VGPR245">;
def VGPR246 : VGPR_32 <246, "VGPR246">;
def VGPR247 : VGPR_32 <247, "VGPR247">;
def VGPR248 : VGPR_32 <248, "VGPR248">;
def VGPR249 : VGPR_32 <249, "VGPR249">;
def VGPR250 : VGPR_32 <250, "VGPR250">;
def VGPR251 : VGPR_32 <251, "VGPR251">;
def VGPR252 : VGPR_32 <252, "VGPR252">;
def VGPR253 : VGPR_32 <253, "VGPR253">;
def VGPR254 : VGPR_32 <254, "VGPR254">;
def VGPR255 : VGPR_32 <255, "VGPR255">;

def SReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
    (add (sequence "SGPR%u", 0, 103),  SREG_LIT_0, M0)
>;

def VReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
    (add (sequence "VGPR%u", 0, 255),
    PERSP_SAMPLE_I, PERSP_SAMPLE_J,
    PERSP_CENTER_I, PERSP_CENTER_J,
    PERSP_CENTROID_I, PERSP_CENTROID_J,
    PERSP_I_W, PERSP_J_W, PERSP_1_W,
    LINEAR_SAMPLE_I, LINEAR_SAMPLE_J,
    LINEAR_CENTER_I, LINEAR_CENTER_J,
    LINEAR_CENTROID_I, LINEAR_CENTROID_J,
    LINE_STIPPLE_TEX_COORD,
    POS_X_FLOAT,
    POS_Y_FLOAT,
    POS_Z_FLOAT,
    POS_W_FLOAT,
    FRONT_FACE,
    ANCILLARY,
    SAMPLE_COVERAGE,
    POS_FIXED_PT
    )
>;

def AllReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
    (add VReg_32, SReg_32) 
>;

def CCReg : RegisterClass<"AMDGPU", [f32], 32, (add VCC, SCC)>;

def SGPR0_64 : SGPR_64 <0, "SGPR0_64", [ SGPR0,SGPR1]>;
def SGPR2_64 : SGPR_64 <2, "SGPR2_64", [ SGPR2,SGPR3]>;
def SGPR4_64 : SGPR_64 <4, "SGPR4_64", [ SGPR4,SGPR5]>;
def SGPR6_64 : SGPR_64 <6, "SGPR6_64", [ SGPR6,SGPR7]>;
def SGPR8_64 : SGPR_64 <8, "SGPR8_64", [ SGPR8,SGPR9]>;
def SGPR10_64 : SGPR_64 <10, "SGPR10_64", [ SGPR10,SGPR11]>;
def SGPR12_64 : SGPR_64 <12, "SGPR12_64", [ SGPR12,SGPR13]>;
def SGPR14_64 : SGPR_64 <14, "SGPR14_64", [ SGPR14,SGPR15]>;
def SGPR16_64 : SGPR_64 <16, "SGPR16_64", [ SGPR16,SGPR17]>;
def SGPR18_64 : SGPR_64 <18, "SGPR18_64", [ SGPR18,SGPR19]>;
def SGPR20_64 : SGPR_64 <20, "SGPR20_64", [ SGPR20,SGPR21]>;
def SGPR22_64 : SGPR_64 <22, "SGPR22_64", [ SGPR22,SGPR23]>;
def SGPR24_64 : SGPR_64 <24, "SGPR24_64", [ SGPR24,SGPR25]>;
def SGPR26_64 : SGPR_64 <26, "SGPR26_64", [ SGPR26,SGPR27]>;
def SGPR28_64 : SGPR_64 <28, "SGPR28_64", [ SGPR28,SGPR29]>;
def SGPR30_64 : SGPR_64 <30, "SGPR30_64", [ SGPR30,SGPR31]>;
def SGPR32_64 : SGPR_64 <32, "SGPR32_64", [ SGPR32,SGPR33]>;
def SGPR34_64 : SGPR_64 <34, "SGPR34_64", [ SGPR34,SGPR35]>;
def SGPR36_64 : SGPR_64 <36, "SGPR36_64", [ SGPR36,SGPR37]>;
def SGPR38_64 : SGPR_64 <38, "SGPR38_64", [ SGPR38,SGPR39]>;
def SGPR40_64 : SGPR_64 <40, "SGPR40_64", [ SGPR40,SGPR41]>;
def SGPR42_64 : SGPR_64 <42, "SGPR42_64", [ SGPR42,SGPR43]>;
def SGPR44_64 : SGPR_64 <44, "SGPR44_64", [ SGPR44,SGPR45]>;
def SGPR46_64 : SGPR_64 <46, "SGPR46_64", [ SGPR46,SGPR47]>;
def SGPR48_64 : SGPR_64 <48, "SGPR48_64", [ SGPR48,SGPR49]>;
def SGPR50_64 : SGPR_64 <50, "SGPR50_64", [ SGPR50,SGPR51]>;
def SGPR52_64 : SGPR_64 <52, "SGPR52_64", [ SGPR52,SGPR53]>;
def SGPR54_64 : SGPR_64 <54, "SGPR54_64", [ SGPR54,SGPR55]>;
def SGPR56_64 : SGPR_64 <56, "SGPR56_64", [ SGPR56,SGPR57]>;
def SGPR58_64 : SGPR_64 <58, "SGPR58_64", [ SGPR58,SGPR59]>;
def SGPR60_64 : SGPR_64 <60, "SGPR60_64", [ SGPR60,SGPR61]>;
def SGPR62_64 : SGPR_64 <62, "SGPR62_64", [ SGPR62,SGPR63]>;
def SGPR64_64 : SGPR_64 <64, "SGPR64_64", [ SGPR64,SGPR65]>;
def SGPR66_64 : SGPR_64 <66, "SGPR66_64", [ SGPR66,SGPR67]>;
def SGPR68_64 : SGPR_64 <68, "SGPR68_64", [ SGPR68,SGPR69]>;
def SGPR70_64 : SGPR_64 <70, "SGPR70_64", [ SGPR70,SGPR71]>;
def SGPR72_64 : SGPR_64 <72, "SGPR72_64", [ SGPR72,SGPR73]>;
def SGPR74_64 : SGPR_64 <74, "SGPR74_64", [ SGPR74,SGPR75]>;
def SGPR76_64 : SGPR_64 <76, "SGPR76_64", [ SGPR76,SGPR77]>;
def SGPR78_64 : SGPR_64 <78, "SGPR78_64", [ SGPR78,SGPR79]>;
def SGPR80_64 : SGPR_64 <80, "SGPR80_64", [ SGPR80,SGPR81]>;
def SGPR82_64 : SGPR_64 <82, "SGPR82_64", [ SGPR82,SGPR83]>;
def SGPR84_64 : SGPR_64 <84, "SGPR84_64", [ SGPR84,SGPR85]>;
def SGPR86_64 : SGPR_64 <86, "SGPR86_64", [ SGPR86,SGPR87]>;
def SGPR88_64 : SGPR_64 <88, "SGPR88_64", [ SGPR88,SGPR89]>;
def SGPR90_64 : SGPR_64 <90, "SGPR90_64", [ SGPR90,SGPR91]>;
def SGPR92_64 : SGPR_64 <92, "SGPR92_64", [ SGPR92,SGPR93]>;
def SGPR94_64 : SGPR_64 <94, "SGPR94_64", [ SGPR94,SGPR95]>;
def SGPR96_64 : SGPR_64 <96, "SGPR96_64", [ SGPR96,SGPR97]>;
def SGPR98_64 : SGPR_64 <98, "SGPR98_64", [ SGPR98,SGPR99]>;
def SGPR100_64 : SGPR_64 <100, "SGPR100_64", [ SGPR100,SGPR101]>;
def SGPR102_64 : SGPR_64 <102, "SGPR102_64", [ SGPR102,SGPR103]>;
def SReg_64 : RegisterClass<"AMDGPU", [i64], 64,
  (add SGPR0_64
, SGPR2_64, SGPR4_64, SGPR6_64, SGPR8_64, SGPR10_64
, SGPR12_64, SGPR14_64, SGPR16_64, SGPR18_64, SGPR20_64
, SGPR22_64, SGPR24_64, SGPR26_64, SGPR28_64, SGPR30_64
, SGPR32_64, SGPR34_64, SGPR36_64, SGPR38_64, SGPR40_64
, SGPR42_64, SGPR44_64, SGPR46_64, SGPR48_64, SGPR50_64
, SGPR52_64, SGPR54_64, SGPR56_64, SGPR58_64, SGPR60_64
, SGPR62_64, SGPR64_64, SGPR66_64, SGPR68_64, SGPR70_64
, SGPR72_64, SGPR74_64, SGPR76_64, SGPR78_64, SGPR80_64
, SGPR82_64, SGPR84_64, SGPR86_64, SGPR88_64, SGPR90_64
, SGPR92_64, SGPR94_64, SGPR96_64, SGPR98_64, SGPR100_64
, SGPR102_64)
>{
}
def SGPR0_128 : SGPR_128 <0, "SGPR0_128", [ SGPR0,SGPR1,SGPR2,SGPR3]>;
def SGPR4_128 : SGPR_128 <4, "SGPR4_128", [ SGPR4,SGPR5,SGPR6,SGPR7]>;
def SGPR8_128 : SGPR_128 <8, "SGPR8_128", [ SGPR8,SGPR9,SGPR10,SGPR11]>;
def SGPR12_128 : SGPR_128 <12, "SGPR12_128", [ SGPR12,SGPR13,SGPR14,SGPR15]>;
def SGPR16_128 : SGPR_128 <16, "SGPR16_128", [ SGPR16,SGPR17,SGPR18,SGPR19]>;
def SGPR20_128 : SGPR_128 <20, "SGPR20_128", [ SGPR20,SGPR21,SGPR22,SGPR23]>;
def SGPR24_128 : SGPR_128 <24, "SGPR24_128", [ SGPR24,SGPR25,SGPR26,SGPR27]>;
def SGPR28_128 : SGPR_128 <28, "SGPR28_128", [ SGPR28,SGPR29,SGPR30,SGPR31]>;
def SGPR32_128 : SGPR_128 <32, "SGPR32_128", [ SGPR32,SGPR33,SGPR34,SGPR35]>;
def SGPR36_128 : SGPR_128 <36, "SGPR36_128", [ SGPR36,SGPR37,SGPR38,SGPR39]>;
def SGPR40_128 : SGPR_128 <40, "SGPR40_128", [ SGPR40,SGPR41,SGPR42,SGPR43]>;
def SGPR44_128 : SGPR_128 <44, "SGPR44_128", [ SGPR44,SGPR45,SGPR46,SGPR47]>;
def SGPR48_128 : SGPR_128 <48, "SGPR48_128", [ SGPR48,SGPR49,SGPR50,SGPR51]>;
def SGPR52_128 : SGPR_128 <52, "SGPR52_128", [ SGPR52,SGPR53,SGPR54,SGPR55]>;
def SGPR56_128 : SGPR_128 <56, "SGPR56_128", [ SGPR56,SGPR57,SGPR58,SGPR59]>;
def SGPR60_128 : SGPR_128 <60, "SGPR60_128", [ SGPR60,SGPR61,SGPR62,SGPR63]>;
def SGPR64_128 : SGPR_128 <64, "SGPR64_128", [ SGPR64,SGPR65,SGPR66,SGPR67]>;
def SGPR68_128 : SGPR_128 <68, "SGPR68_128", [ SGPR68,SGPR69,SGPR70,SGPR71]>;
def SGPR72_128 : SGPR_128 <72, "SGPR72_128", [ SGPR72,SGPR73,SGPR74,SGPR75]>;
def SGPR76_128 : SGPR_128 <76, "SGPR76_128", [ SGPR76,SGPR77,SGPR78,SGPR79]>;
def SGPR80_128 : SGPR_128 <80, "SGPR80_128", [ SGPR80,SGPR81,SGPR82,SGPR83]>;
def SGPR84_128 : SGPR_128 <84, "SGPR84_128", [ SGPR84,SGPR85,SGPR86,SGPR87]>;
def SGPR88_128 : SGPR_128 <88, "SGPR88_128", [ SGPR88,SGPR89,SGPR90,SGPR91]>;
def SGPR92_128 : SGPR_128 <92, "SGPR92_128", [ SGPR92,SGPR93,SGPR94,SGPR95]>;
def SGPR96_128 : SGPR_128 <96, "SGPR96_128", [ SGPR96,SGPR97,SGPR98,SGPR99]>;
def SGPR100_128 : SGPR_128 <100, "SGPR100_128", [ SGPR100,SGPR101,SGPR102,SGPR103]>;
def SReg_128 : RegisterClass<"AMDGPU", [v4f32, v4i32], 128,
  (add SGPR0_128
, SGPR4_128, SGPR8_128, SGPR12_128, SGPR16_128, SGPR20_128
, SGPR24_128, SGPR28_128, SGPR32_128, SGPR36_128, SGPR40_128
, SGPR44_128, SGPR48_128, SGPR52_128, SGPR56_128, SGPR60_128
, SGPR64_128, SGPR68_128, SGPR72_128, SGPR76_128, SGPR80_128
, SGPR84_128, SGPR88_128, SGPR92_128, SGPR96_128, SGPR100_128
)
>{
}
def SGPR0_256 : SGPR_256 <0, "SGPR0_256", [ SGPR0,SGPR1,SGPR2,SGPR3,SGPR4,SGPR5,SGPR6,SGPR7]>;
def SGPR8_256 : SGPR_256 <8, "SGPR8_256", [ SGPR8,SGPR9,SGPR10,SGPR11,SGPR12,SGPR13,SGPR14,SGPR15]>;
def SGPR16_256 : SGPR_256 <16, "SGPR16_256", [ SGPR16,SGPR17,SGPR18,SGPR19,SGPR20,SGPR21,SGPR22,SGPR23]>;
def SGPR24_256 : SGPR_256 <24, "SGPR24_256", [ SGPR24,SGPR25,SGPR26,SGPR27,SGPR28,SGPR29,SGPR30,SGPR31]>;
def SGPR32_256 : SGPR_256 <32, "SGPR32_256", [ SGPR32,SGPR33,SGPR34,SGPR35,SGPR36,SGPR37,SGPR38,SGPR39]>;
def SGPR40_256 : SGPR_256 <40, "SGPR40_256", [ SGPR40,SGPR41,SGPR42,SGPR43,SGPR44,SGPR45,SGPR46,SGPR47]>;
def SGPR48_256 : SGPR_256 <48, "SGPR48_256", [ SGPR48,SGPR49,SGPR50,SGPR51,SGPR52,SGPR53,SGPR54,SGPR55]>;
def SGPR56_256 : SGPR_256 <56, "SGPR56_256", [ SGPR56,SGPR57,SGPR58,SGPR59,SGPR60,SGPR61,SGPR62,SGPR63]>;
def SGPR64_256 : SGPR_256 <64, "SGPR64_256", [ SGPR64,SGPR65,SGPR66,SGPR67,SGPR68,SGPR69,SGPR70,SGPR71]>;
def SGPR72_256 : SGPR_256 <72, "SGPR72_256", [ SGPR72,SGPR73,SGPR74,SGPR75,SGPR76,SGPR77,SGPR78,SGPR79]>;
def SGPR80_256 : SGPR_256 <80, "SGPR80_256", [ SGPR80,SGPR81,SGPR82,SGPR83,SGPR84,SGPR85,SGPR86,SGPR87]>;
def SGPR88_256 : SGPR_256 <88, "SGPR88_256", [ SGPR88,SGPR89,SGPR90,SGPR91,SGPR92,SGPR93,SGPR94,SGPR95]>;
def SGPR96_256 : SGPR_256 <96, "SGPR96_256", [ SGPR96,SGPR97,SGPR98,SGPR99,SGPR100,SGPR101,SGPR102,SGPR103]>;
def SReg_256 : RegisterClass<"AMDGPU", [v8i32], 256,
  (add SGPR0_256
, SGPR8_256, SGPR16_256, SGPR24_256, SGPR32_256, SGPR40_256
, SGPR48_256, SGPR56_256, SGPR64_256, SGPR72_256, SGPR80_256
, SGPR88_256, SGPR96_256)
>{
}
def VGPR0_64 : VGPR_64 <0, "VGPR0_64", [ VGPR0,VGPR1]>;
def VGPR2_64 : VGPR_64 <2, "VGPR2_64", [ VGPR2,VGPR3]>;
def VGPR4_64 : VGPR_64 <4, "VGPR4_64", [ VGPR4,VGPR5]>;
def VGPR6_64 : VGPR_64 <6, "VGPR6_64", [ VGPR6,VGPR7]>;
def VGPR8_64 : VGPR_64 <8, "VGPR8_64", [ VGPR8,VGPR9]>;
def VGPR10_64 : VGPR_64 <10, "VGPR10_64", [ VGPR10,VGPR11]>;
def VGPR12_64 : VGPR_64 <12, "VGPR12_64", [ VGPR12,VGPR13]>;
def VGPR14_64 : VGPR_64 <14, "VGPR14_64", [ VGPR14,VGPR15]>;
def VGPR16_64 : VGPR_64 <16, "VGPR16_64", [ VGPR16,VGPR17]>;
def VGPR18_64 : VGPR_64 <18, "VGPR18_64", [ VGPR18,VGPR19]>;
def VGPR20_64 : VGPR_64 <20, "VGPR20_64", [ VGPR20,VGPR21]>;
def VGPR22_64 : VGPR_64 <22, "VGPR22_64", [ VGPR22,VGPR23]>;
def VGPR24_64 : VGPR_64 <24, "VGPR24_64", [ VGPR24,VGPR25]>;
def VGPR26_64 : VGPR_64 <26, "VGPR26_64", [ VGPR26,VGPR27]>;
def VGPR28_64 : VGPR_64 <28, "VGPR28_64", [ VGPR28,VGPR29]>;
def VGPR30_64 : VGPR_64 <30, "VGPR30_64", [ VGPR30,VGPR31]>;
def VGPR32_64 : VGPR_64 <32, "VGPR32_64", [ VGPR32,VGPR33]>;
def VGPR34_64 : VGPR_64 <34, "VGPR34_64", [ VGPR34,VGPR35]>;
def VGPR36_64 : VGPR_64 <36, "VGPR36_64", [ VGPR36,VGPR37]>;
def VGPR38_64 : VGPR_64 <38, "VGPR38_64", [ VGPR38,VGPR39]>;
def VGPR40_64 : VGPR_64 <40, "VGPR40_64", [ VGPR40,VGPR41]>;
def VGPR42_64 : VGPR_64 <42, "VGPR42_64", [ VGPR42,VGPR43]>;
def VGPR44_64 : VGPR_64 <44, "VGPR44_64", [ VGPR44,VGPR45]>;
def VGPR46_64 : VGPR_64 <46, "VGPR46_64", [ VGPR46,VGPR47]>;
def VGPR48_64 : VGPR_64 <48, "VGPR48_64", [ VGPR48,VGPR49]>;
def VGPR50_64 : VGPR_64 <50, "VGPR50_64", [ VGPR50,VGPR51]>;
def VGPR52_64 : VGPR_64 <52, "VGPR52_64", [ VGPR52,VGPR53]>;
def VGPR54_64 : VGPR_64 <54, "VGPR54_64", [ VGPR54,VGPR55]>;
def VGPR56_64 : VGPR_64 <56, "VGPR56_64", [ VGPR56,VGPR57]>;
def VGPR58_64 : VGPR_64 <58, "VGPR58_64", [ VGPR58,VGPR59]>;
def VGPR60_64 : VGPR_64 <60, "VGPR60_64", [ VGPR60,VGPR61]>;
def VGPR62_64 : VGPR_64 <62, "VGPR62_64", [ VGPR62,VGPR63]>;
def VGPR64_64 : VGPR_64 <64, "VGPR64_64", [ VGPR64,VGPR65]>;
def VGPR66_64 : VGPR_64 <66, "VGPR66_64", [ VGPR66,VGPR67]>;
def VGPR68_64 : VGPR_64 <68, "VGPR68_64", [ VGPR68,VGPR69]>;
def VGPR70_64 : VGPR_64 <70, "VGPR70_64", [ VGPR70,VGPR71]>;
def VGPR72_64 : VGPR_64 <72, "VGPR72_64", [ VGPR72,VGPR73]>;
def VGPR74_64 : VGPR_64 <74, "VGPR74_64", [ VGPR74,VGPR75]>;
def VGPR76_64 : VGPR_64 <76, "VGPR76_64", [ VGPR76,VGPR77]>;
def VGPR78_64 : VGPR_64 <78, "VGPR78_64", [ VGPR78,VGPR79]>;
def VGPR80_64 : VGPR_64 <80, "VGPR80_64", [ VGPR80,VGPR81]>;
def VGPR82_64 : VGPR_64 <82, "VGPR82_64", [ VGPR82,VGPR83]>;
def VGPR84_64 : VGPR_64 <84, "VGPR84_64", [ VGPR84,VGPR85]>;
def VGPR86_64 : VGPR_64 <86, "VGPR86_64", [ VGPR86,VGPR87]>;
def VGPR88_64 : VGPR_64 <88, "VGPR88_64", [ VGPR88,VGPR89]>;
def VGPR90_64 : VGPR_64 <90, "VGPR90_64", [ VGPR90,VGPR91]>;
def VGPR92_64 : VGPR_64 <92, "VGPR92_64", [ VGPR92,VGPR93]>;
def VGPR94_64 : VGPR_64 <94, "VGPR94_64", [ VGPR94,VGPR95]>;
def VGPR96_64 : VGPR_64 <96, "VGPR96_64", [ VGPR96,VGPR97]>;
def VGPR98_64 : VGPR_64 <98, "VGPR98_64", [ VGPR98,VGPR99]>;
def VGPR100_64 : VGPR_64 <100, "VGPR100_64", [ VGPR100,VGPR101]>;
def VGPR102_64 : VGPR_64 <102, "VGPR102_64", [ VGPR102,VGPR103]>;
def VGPR104_64 : VGPR_64 <104, "VGPR104_64", [ VGPR104,VGPR105]>;
def VGPR106_64 : VGPR_64 <106, "VGPR106_64", [ VGPR106,VGPR107]>;
def VGPR108_64 : VGPR_64 <108, "VGPR108_64", [ VGPR108,VGPR109]>;
def VGPR110_64 : VGPR_64 <110, "VGPR110_64", [ VGPR110,VGPR111]>;
def VGPR112_64 : VGPR_64 <112, "VGPR112_64", [ VGPR112,VGPR113]>;
def VGPR114_64 : VGPR_64 <114, "VGPR114_64", [ VGPR114,VGPR115]>;
def VGPR116_64 : VGPR_64 <116, "VGPR116_64", [ VGPR116,VGPR117]>;
def VGPR118_64 : VGPR_64 <118, "VGPR118_64", [ VGPR118,VGPR119]>;
def VGPR120_64 : VGPR_64 <120, "VGPR120_64", [ VGPR120,VGPR121]>;
def VGPR122_64 : VGPR_64 <122, "VGPR122_64", [ VGPR122,VGPR123]>;
def VGPR124_64 : VGPR_64 <124, "VGPR124_64", [ VGPR124,VGPR125]>;
def VGPR126_64 : VGPR_64 <126, "VGPR126_64", [ VGPR126,VGPR127]>;
def VGPR128_64 : VGPR_64 <128, "VGPR128_64", [ VGPR128,VGPR129]>;
def VGPR130_64 : VGPR_64 <130, "VGPR130_64", [ VGPR130,VGPR131]>;
def VGPR132_64 : VGPR_64 <132, "VGPR132_64", [ VGPR132,VGPR133]>;
def VGPR134_64 : VGPR_64 <134, "VGPR134_64", [ VGPR134,VGPR135]>;
def VGPR136_64 : VGPR_64 <136, "VGPR136_64", [ VGPR136,VGPR137]>;
def VGPR138_64 : VGPR_64 <138, "VGPR138_64", [ VGPR138,VGPR139]>;
def VGPR140_64 : VGPR_64 <140, "VGPR140_64", [ VGPR140,VGPR141]>;
def VGPR142_64 : VGPR_64 <142, "VGPR142_64", [ VGPR142,VGPR143]>;
def VGPR144_64 : VGPR_64 <144, "VGPR144_64", [ VGPR144,VGPR145]>;
def VGPR146_64 : VGPR_64 <146, "VGPR146_64", [ VGPR146,VGPR147]>;
def VGPR148_64 : VGPR_64 <148, "VGPR148_64", [ VGPR148,VGPR149]>;
def VGPR150_64 : VGPR_64 <150, "VGPR150_64", [ VGPR150,VGPR151]>;
def VGPR152_64 : VGPR_64 <152, "VGPR152_64", [ VGPR152,VGPR153]>;
def VGPR154_64 : VGPR_64 <154, "VGPR154_64", [ VGPR154,VGPR155]>;
def VGPR156_64 : VGPR_64 <156, "VGPR156_64", [ VGPR156,VGPR157]>;
def VGPR158_64 : VGPR_64 <158, "VGPR158_64", [ VGPR158,VGPR159]>;
def VGPR160_64 : VGPR_64 <160, "VGPR160_64", [ VGPR160,VGPR161]>;
def VGPR162_64 : VGPR_64 <162, "VGPR162_64", [ VGPR162,VGPR163]>;
def VGPR164_64 : VGPR_64 <164, "VGPR164_64", [ VGPR164,VGPR165]>;
def VGPR166_64 : VGPR_64 <166, "VGPR166_64", [ VGPR166,VGPR167]>;
def VGPR168_64 : VGPR_64 <168, "VGPR168_64", [ VGPR168,VGPR169]>;
def VGPR170_64 : VGPR_64 <170, "VGPR170_64", [ VGPR170,VGPR171]>;
def VGPR172_64 : VGPR_64 <172, "VGPR172_64", [ VGPR172,VGPR173]>;
def VGPR174_64 : VGPR_64 <174, "VGPR174_64", [ VGPR174,VGPR175]>;
def VGPR176_64 : VGPR_64 <176, "VGPR176_64", [ VGPR176,VGPR177]>;
def VGPR178_64 : VGPR_64 <178, "VGPR178_64", [ VGPR178,VGPR179]>;
def VGPR180_64 : VGPR_64 <180, "VGPR180_64", [ VGPR180,VGPR181]>;
def VGPR182_64 : VGPR_64 <182, "VGPR182_64", [ VGPR182,VGPR183]>;
def VGPR184_64 : VGPR_64 <184, "VGPR184_64", [ VGPR184,VGPR185]>;
def VGPR186_64 : VGPR_64 <186, "VGPR186_64", [ VGPR186,VGPR187]>;
def VGPR188_64 : VGPR_64 <188, "VGPR188_64", [ VGPR188,VGPR189]>;
def VGPR190_64 : VGPR_64 <190, "VGPR190_64", [ VGPR190,VGPR191]>;
def VGPR192_64 : VGPR_64 <192, "VGPR192_64", [ VGPR192,VGPR193]>;
def VGPR194_64 : VGPR_64 <194, "VGPR194_64", [ VGPR194,VGPR195]>;
def VGPR196_64 : VGPR_64 <196, "VGPR196_64", [ VGPR196,VGPR197]>;
def VGPR198_64 : VGPR_64 <198, "VGPR198_64", [ VGPR198,VGPR199]>;
def VGPR200_64 : VGPR_64 <200, "VGPR200_64", [ VGPR200,VGPR201]>;
def VGPR202_64 : VGPR_64 <202, "VGPR202_64", [ VGPR202,VGPR203]>;
def VGPR204_64 : VGPR_64 <204, "VGPR204_64", [ VGPR204,VGPR205]>;
def VGPR206_64 : VGPR_64 <206, "VGPR206_64", [ VGPR206,VGPR207]>;
def VGPR208_64 : VGPR_64 <208, "VGPR208_64", [ VGPR208,VGPR209]>;
def VGPR210_64 : VGPR_64 <210, "VGPR210_64", [ VGPR210,VGPR211]>;
def VGPR212_64 : VGPR_64 <212, "VGPR212_64", [ VGPR212,VGPR213]>;
def VGPR214_64 : VGPR_64 <214, "VGPR214_64", [ VGPR214,VGPR215]>;
def VGPR216_64 : VGPR_64 <216, "VGPR216_64", [ VGPR216,VGPR217]>;
def VGPR218_64 : VGPR_64 <218, "VGPR218_64", [ VGPR218,VGPR219]>;
def VGPR220_64 : VGPR_64 <220, "VGPR220_64", [ VGPR220,VGPR221]>;
def VGPR222_64 : VGPR_64 <222, "VGPR222_64", [ VGPR222,VGPR223]>;
def VGPR224_64 : VGPR_64 <224, "VGPR224_64", [ VGPR224,VGPR225]>;
def VGPR226_64 : VGPR_64 <226, "VGPR226_64", [ VGPR226,VGPR227]>;
def VGPR228_64 : VGPR_64 <228, "VGPR228_64", [ VGPR228,VGPR229]>;
def VGPR230_64 : VGPR_64 <230, "VGPR230_64", [ VGPR230,VGPR231]>;
def VGPR232_64 : VGPR_64 <232, "VGPR232_64", [ VGPR232,VGPR233]>;
def VGPR234_64 : VGPR_64 <234, "VGPR234_64", [ VGPR234,VGPR235]>;
def VGPR236_64 : VGPR_64 <236, "VGPR236_64", [ VGPR236,VGPR237]>;
def VGPR238_64 : VGPR_64 <238, "VGPR238_64", [ VGPR238,VGPR239]>;
def VGPR240_64 : VGPR_64 <240, "VGPR240_64", [ VGPR240,VGPR241]>;
def VGPR242_64 : VGPR_64 <242, "VGPR242_64", [ VGPR242,VGPR243]>;
def VGPR244_64 : VGPR_64 <244, "VGPR244_64", [ VGPR244,VGPR245]>;
def VGPR246_64 : VGPR_64 <246, "VGPR246_64", [ VGPR246,VGPR247]>;
def VGPR248_64 : VGPR_64 <248, "VGPR248_64", [ VGPR248,VGPR249]>;
def VGPR250_64 : VGPR_64 <250, "VGPR250_64", [ VGPR250,VGPR251]>;
def VGPR252_64 : VGPR_64 <252, "VGPR252_64", [ VGPR252,VGPR253]>;
def VGPR254_64 : VGPR_64 <254, "VGPR254_64", [ VGPR254,VGPR255]>;
def VReg_64 : RegisterClass<"AMDGPU", [i64], 64,
  (add VGPR0_64
, VGPR2_64, VGPR4_64, VGPR6_64, VGPR8_64, VGPR10_64
, VGPR12_64, VGPR14_64, VGPR16_64, VGPR18_64, VGPR20_64
, VGPR22_64, VGPR24_64, VGPR26_64, VGPR28_64, VGPR30_64
, VGPR32_64, VGPR34_64, VGPR36_64, VGPR38_64, VGPR40_64
, VGPR42_64, VGPR44_64, VGPR46_64, VGPR48_64, VGPR50_64
, VGPR52_64, VGPR54_64, VGPR56_64, VGPR58_64, VGPR60_64
, VGPR62_64, VGPR64_64, VGPR66_64, VGPR68_64, VGPR70_64
, VGPR72_64, VGPR74_64, VGPR76_64, VGPR78_64, VGPR80_64
, VGPR82_64, VGPR84_64, VGPR86_64, VGPR88_64, VGPR90_64
, VGPR92_64, VGPR94_64, VGPR96_64, VGPR98_64, VGPR100_64
, VGPR102_64, VGPR104_64, VGPR106_64, VGPR108_64, VGPR110_64
, VGPR112_64, VGPR114_64, VGPR116_64, VGPR118_64, VGPR120_64
, VGPR122_64, VGPR124_64, VGPR126_64, VGPR128_64, VGPR130_64
, VGPR132_64, VGPR134_64, VGPR136_64, VGPR138_64, VGPR140_64
, VGPR142_64, VGPR144_64, VGPR146_64, VGPR148_64, VGPR150_64
, VGPR152_64, VGPR154_64, VGPR156_64, VGPR158_64, VGPR160_64
, VGPR162_64, VGPR164_64, VGPR166_64, VGPR168_64, VGPR170_64
, VGPR172_64, VGPR174_64, VGPR176_64, VGPR178_64, VGPR180_64
, VGPR182_64, VGPR184_64, VGPR186_64, VGPR188_64, VGPR190_64
, VGPR192_64, VGPR194_64, VGPR196_64, VGPR198_64, VGPR200_64
, VGPR202_64, VGPR204_64, VGPR206_64, VGPR208_64, VGPR210_64
, VGPR212_64, VGPR214_64, VGPR216_64, VGPR218_64, VGPR220_64
, VGPR222_64, VGPR224_64, VGPR226_64, VGPR228_64, VGPR230_64
, VGPR232_64, VGPR234_64, VGPR236_64, VGPR238_64, VGPR240_64
, VGPR242_64, VGPR244_64, VGPR246_64, VGPR248_64, VGPR250_64
, VGPR252_64, VGPR254_64)
>{
}
def VGPR0_128 : VGPR_128 <0, "VGPR0_128", [ VGPR0,VGPR1,VGPR2,VGPR3]>;
def VGPR4_128 : VGPR_128 <4, "VGPR4_128", [ VGPR4,VGPR5,VGPR6,VGPR7]>;
def VGPR8_128 : VGPR_128 <8, "VGPR8_128", [ VGPR8,VGPR9,VGPR10,VGPR11]>;
def VGPR12_128 : VGPR_128 <12, "VGPR12_128", [ VGPR12,VGPR13,VGPR14,VGPR15]>;
def VGPR16_128 : VGPR_128 <16, "VGPR16_128", [ VGPR16,VGPR17,VGPR18,VGPR19]>;
def VGPR20_128 : VGPR_128 <20, "VGPR20_128", [ VGPR20,VGPR21,VGPR22,VGPR23]>;
def VGPR24_128 : VGPR_128 <24, "VGPR24_128", [ VGPR24,VGPR25,VGPR26,VGPR27]>;
def VGPR28_128 : VGPR_128 <28, "VGPR28_128", [ VGPR28,VGPR29,VGPR30,VGPR31]>;
def VGPR32_128 : VGPR_128 <32, "VGPR32_128", [ VGPR32,VGPR33,VGPR34,VGPR35]>;
def VGPR36_128 : VGPR_128 <36, "VGPR36_128", [ VGPR36,VGPR37,VGPR38,VGPR39]>;
def VGPR40_128 : VGPR_128 <40, "VGPR40_128", [ VGPR40,VGPR41,VGPR42,VGPR43]>;
def VGPR44_128 : VGPR_128 <44, "VGPR44_128", [ VGPR44,VGPR45,VGPR46,VGPR47]>;
def VGPR48_128 : VGPR_128 <48, "VGPR48_128", [ VGPR48,VGPR49,VGPR50,VGPR51]>;
def VGPR52_128 : VGPR_128 <52, "VGPR52_128", [ VGPR52,VGPR53,VGPR54,VGPR55]>;
def VGPR56_128 : VGPR_128 <56, "VGPR56_128", [ VGPR56,VGPR57,VGPR58,VGPR59]>;
def VGPR60_128 : VGPR_128 <60, "VGPR60_128", [ VGPR60,VGPR61,VGPR62,VGPR63]>;
def VGPR64_128 : VGPR_128 <64, "VGPR64_128", [ VGPR64,VGPR65,VGPR66,VGPR67]>;
def VGPR68_128 : VGPR_128 <68, "VGPR68_128", [ VGPR68,VGPR69,VGPR70,VGPR71]>;
def VGPR72_128 : VGPR_128 <72, "VGPR72_128", [ VGPR72,VGPR73,VGPR74,VGPR75]>;
def VGPR76_128 : VGPR_128 <76, "VGPR76_128", [ VGPR76,VGPR77,VGPR78,VGPR79]>;
def VGPR80_128 : VGPR_128 <80, "VGPR80_128", [ VGPR80,VGPR81,VGPR82,VGPR83]>;
def VGPR84_128 : VGPR_128 <84, "VGPR84_128", [ VGPR84,VGPR85,VGPR86,VGPR87]>;
def VGPR88_128 : VGPR_128 <88, "VGPR88_128", [ VGPR88,VGPR89,VGPR90,VGPR91]>;
def VGPR92_128 : VGPR_128 <92, "VGPR92_128", [ VGPR92,VGPR93,VGPR94,VGPR95]>;
def VGPR96_128 : VGPR_128 <96, "VGPR96_128", [ VGPR96,VGPR97,VGPR98,VGPR99]>;
def VGPR100_128 : VGPR_128 <100, "VGPR100_128", [ VGPR100,VGPR101,VGPR102,VGPR103]>;
def VGPR104_128 : VGPR_128 <104, "VGPR104_128", [ VGPR104,VGPR105,VGPR106,VGPR107]>;
def VGPR108_128 : VGPR_128 <108, "VGPR108_128", [ VGPR108,VGPR109,VGPR110,VGPR111]>;
def VGPR112_128 : VGPR_128 <112, "VGPR112_128", [ VGPR112,VGPR113,VGPR114,VGPR115]>;
def VGPR116_128 : VGPR_128 <116, "VGPR116_128", [ VGPR116,VGPR117,VGPR118,VGPR119]>;
def VGPR120_128 : VGPR_128 <120, "VGPR120_128", [ VGPR120,VGPR121,VGPR122,VGPR123]>;
def VGPR124_128 : VGPR_128 <124, "VGPR124_128", [ VGPR124,VGPR125,VGPR126,VGPR127]>;
def VGPR128_128 : VGPR_128 <128, "VGPR128_128", [ VGPR128,VGPR129,VGPR130,VGPR131]>;
def VGPR132_128 : VGPR_128 <132, "VGPR132_128", [ VGPR132,VGPR133,VGPR134,VGPR135]>;
def VGPR136_128 : VGPR_128 <136, "VGPR136_128", [ VGPR136,VGPR137,VGPR138,VGPR139]>;
def VGPR140_128 : VGPR_128 <140, "VGPR140_128", [ VGPR140,VGPR141,VGPR142,VGPR143]>;
def VGPR144_128 : VGPR_128 <144, "VGPR144_128", [ VGPR144,VGPR145,VGPR146,VGPR147]>;
def VGPR148_128 : VGPR_128 <148, "VGPR148_128", [ VGPR148,VGPR149,VGPR150,VGPR151]>;
def VGPR152_128 : VGPR_128 <152, "VGPR152_128", [ VGPR152,VGPR153,VGPR154,VGPR155]>;
def VGPR156_128 : VGPR_128 <156, "VGPR156_128", [ VGPR156,VGPR157,VGPR158,VGPR159]>;
def VGPR160_128 : VGPR_128 <160, "VGPR160_128", [ VGPR160,VGPR161,VGPR162,VGPR163]>;
def VGPR164_128 : VGPR_128 <164, "VGPR164_128", [ VGPR164,VGPR165,VGPR166,VGPR167]>;
def VGPR168_128 : VGPR_128 <168, "VGPR168_128", [ VGPR168,VGPR169,VGPR170,VGPR171]>;
def VGPR172_128 : VGPR_128 <172, "VGPR172_128", [ VGPR172,VGPR173,VGPR174,VGPR175]>;
def VGPR176_128 : VGPR_128 <176, "VGPR176_128", [ VGPR176,VGPR177,VGPR178,VGPR179]>;
def VGPR180_128 : VGPR_128 <180, "VGPR180_128", [ VGPR180,VGPR181,VGPR182,VGPR183]>;
def VGPR184_128 : VGPR_128 <184, "VGPR184_128", [ VGPR184,VGPR185,VGPR186,VGPR187]>;
def VGPR188_128 : VGPR_128 <188, "VGPR188_128", [ VGPR188,VGPR189,VGPR190,VGPR191]>;
def VGPR192_128 : VGPR_128 <192, "VGPR192_128", [ VGPR192,VGPR193,VGPR194,VGPR195]>;
def VGPR196_128 : VGPR_128 <196, "VGPR196_128", [ VGPR196,VGPR197,VGPR198,VGPR199]>;
def VGPR200_128 : VGPR_128 <200, "VGPR200_128", [ VGPR200,VGPR201,VGPR202,VGPR203]>;
def VGPR204_128 : VGPR_128 <204, "VGPR204_128", [ VGPR204,VGPR205,VGPR206,VGPR207]>;
def VGPR208_128 : VGPR_128 <208, "VGPR208_128", [ VGPR208,VGPR209,VGPR210,VGPR211]>;
def VGPR212_128 : VGPR_128 <212, "VGPR212_128", [ VGPR212,VGPR213,VGPR214,VGPR215]>;
def VGPR216_128 : VGPR_128 <216, "VGPR216_128", [ VGPR216,VGPR217,VGPR218,VGPR219]>;
def VGPR220_128 : VGPR_128 <220, "VGPR220_128", [ VGPR220,VGPR221,VGPR222,VGPR223]>;
def VGPR224_128 : VGPR_128 <224, "VGPR224_128", [ VGPR224,VGPR225,VGPR226,VGPR227]>;
def VGPR228_128 : VGPR_128 <228, "VGPR228_128", [ VGPR228,VGPR229,VGPR230,VGPR231]>;
def VGPR232_128 : VGPR_128 <232, "VGPR232_128", [ VGPR232,VGPR233,VGPR234,VGPR235]>;
def VGPR236_128 : VGPR_128 <236, "VGPR236_128", [ VGPR236,VGPR237,VGPR238,VGPR239]>;
def VGPR240_128 : VGPR_128 <240, "VGPR240_128", [ VGPR240,VGPR241,VGPR242,VGPR243]>;
def VGPR244_128 : VGPR_128 <244, "VGPR244_128", [ VGPR244,VGPR245,VGPR246,VGPR247]>;
def VGPR248_128 : VGPR_128 <248, "VGPR248_128", [ VGPR248,VGPR249,VGPR250,VGPR251]>;
def VGPR252_128 : VGPR_128 <252, "VGPR252_128", [ VGPR252,VGPR253,VGPR254,VGPR255]>;
def VReg_128 : RegisterClass<"AMDGPU", [v4f32], 128,
  (add VGPR0_128
, VGPR4_128, VGPR8_128, VGPR12_128, VGPR16_128, VGPR20_128
, VGPR24_128, VGPR28_128, VGPR32_128, VGPR36_128, VGPR40_128
, VGPR44_128, VGPR48_128, VGPR52_128, VGPR56_128, VGPR60_128
, VGPR64_128, VGPR68_128, VGPR72_128, VGPR76_128, VGPR80_128
, VGPR84_128, VGPR88_128, VGPR92_128, VGPR96_128, VGPR100_128
, VGPR104_128, VGPR108_128, VGPR112_128, VGPR116_128, VGPR120_128
, VGPR124_128, VGPR128_128, VGPR132_128, VGPR136_128, VGPR140_128
, VGPR144_128, VGPR148_128, VGPR152_128, VGPR156_128, VGPR160_128
, VGPR164_128, VGPR168_128, VGPR172_128, VGPR176_128, VGPR180_128
, VGPR184_128, VGPR188_128, VGPR192_128, VGPR196_128, VGPR200_128
, VGPR204_128, VGPR208_128, VGPR212_128, VGPR216_128, VGPR220_128
, VGPR224_128, VGPR228_128, VGPR232_128, VGPR236_128, VGPR240_128
, VGPR244_128, VGPR248_128, VGPR252_128)
>{
}

def AllReg_64 : RegisterClass<"AMDGPU", [f64, i64], 64,
    (add SGPR0_64
,SGPR2_64,SGPR4_64,SGPR6_64,SGPR8_64,SGPR10_64
,SGPR12_64,SGPR14_64,SGPR16_64,SGPR18_64,SGPR20_64
,SGPR22_64,SGPR24_64,SGPR26_64,SGPR28_64,SGPR30_64
,SGPR32_64,SGPR34_64,SGPR36_64,SGPR38_64,SGPR40_64
,SGPR42_64,SGPR44_64,SGPR46_64,SGPR48_64,SGPR50_64
,SGPR52_64,SGPR54_64,SGPR56_64,SGPR58_64,SGPR60_64
,SGPR62_64,SGPR64_64,SGPR66_64,SGPR68_64,SGPR70_64
,SGPR72_64,SGPR74_64,SGPR76_64,SGPR78_64,SGPR80_64
,SGPR82_64,SGPR84_64,SGPR86_64,SGPR88_64,SGPR90_64
,SGPR92_64,SGPR94_64,SGPR96_64,SGPR98_64,SGPR100_64
,SGPR102_64, VGPR0_64
,VGPR2_64,VGPR4_64,VGPR6_64,VGPR8_64,VGPR10_64
,VGPR12_64,VGPR14_64,VGPR16_64,VGPR18_64,VGPR20_64
,VGPR22_64,VGPR24_64,VGPR26_64,VGPR28_64,VGPR30_64
,VGPR32_64,VGPR34_64,VGPR36_64,VGPR38_64,VGPR40_64
,VGPR42_64,VGPR44_64,VGPR46_64,VGPR48_64,VGPR50_64
,VGPR52_64,VGPR54_64,VGPR56_64,VGPR58_64,VGPR60_64
,VGPR62_64,VGPR64_64,VGPR66_64,VGPR68_64,VGPR70_64
,VGPR72_64,VGPR74_64,VGPR76_64,VGPR78_64,VGPR80_64
,VGPR82_64,VGPR84_64,VGPR86_64,VGPR88_64,VGPR90_64
,VGPR92_64,VGPR94_64,VGPR96_64,VGPR98_64,VGPR100_64
,VGPR102_64,VGPR104_64,VGPR106_64,VGPR108_64,VGPR110_64
,VGPR112_64,VGPR114_64,VGPR116_64,VGPR118_64,VGPR120_64
,VGPR122_64,VGPR124_64,VGPR126_64,VGPR128_64,VGPR130_64
,VGPR132_64,VGPR134_64,VGPR136_64,VGPR138_64,VGPR140_64
,VGPR142_64,VGPR144_64,VGPR146_64,VGPR148_64,VGPR150_64
,VGPR152_64,VGPR154_64,VGPR156_64,VGPR158_64,VGPR160_64
,VGPR162_64,VGPR164_64,VGPR166_64,VGPR168_64,VGPR170_64
,VGPR172_64,VGPR174_64,VGPR176_64,VGPR178_64,VGPR180_64
,VGPR182_64,VGPR184_64,VGPR186_64,VGPR188_64,VGPR190_64
,VGPR192_64,VGPR194_64,VGPR196_64,VGPR198_64,VGPR200_64
,VGPR202_64,VGPR204_64,VGPR206_64,VGPR208_64,VGPR210_64
,VGPR212_64,VGPR214_64,VGPR216_64,VGPR218_64,VGPR220_64
,VGPR222_64,VGPR224_64,VGPR226_64,VGPR228_64,VGPR230_64
,VGPR232_64,VGPR234_64,VGPR236_64,VGPR238_64,VGPR240_64
,VGPR242_64,VGPR244_64,VGPR246_64,VGPR248_64,VGPR250_64
,VGPR252_64,VGPR254_64)
>;