From f693787ed060a7b80ff8e55a3c1a7c4dd1e94121 Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Mon, 15 Sep 2014 23:47:57 +0000 Subject: [FastISel][AArch64] Add missing test case for previous commit. This adds the missing test case for the previous commit: Allow handling of vectors during return lowering for little endian machines. Sorry for the noise. llvm-svn: 217847 --- llvm/test/CodeGen/AArch64/fast-isel-vret.ll | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-vret.ll (limited to 'llvm') diff --git a/llvm/test/CodeGen/AArch64/fast-isel-vret.ll b/llvm/test/CodeGen/AArch64/fast-isel-vret.ll new file mode 100644 index 00000000000..9ad92273d3a --- /dev/null +++ b/llvm/test/CodeGen/AArch64/fast-isel-vret.ll @@ -0,0 +1,9 @@ +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s + +; Test that we don't abort fast-isle for ret +define <8 x i8> @ret_v8i8(<8 x i8> %a, <8 x i8> %b) { +; CHECK-LABEL: ret_v8i8 +; CHECK: add.8b v0, v0, v1 + %1 = add <8 x i8> %a, %b + ret <8 x i8> %1 +} -- cgit v1.2.3