From dbe73c5d6d99f33ade487640efa1f7c5c4aed7fa Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Wed, 22 Oct 2003 05:50:40 +0000 Subject: Add comments to describe what these functions actually do. llvm-svn: 9370 --- llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'llvm') diff --git a/llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h b/llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h index 7a3c081d159..d49863c1c84 100644 --- a/llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h +++ b/llvm/lib/Target/Sparc/SparcInstrSelectionSupport.h @@ -17,6 +17,7 @@ #include "llvm/DerivedTypes.h" #include "SparcInternals.h" +// Choose load instruction opcode based on type of value inline MachineOpCode ChooseLoadInstruction(const Type *DestTy) { @@ -39,6 +40,7 @@ ChooseLoadInstruction(const Type *DestTy) return 0; } +// Choose store instruction opcode based on type of value inline MachineOpCode ChooseStoreInstruction(const Type *DestTy) { @@ -86,6 +88,11 @@ ChooseAddInstructionByType(const Type* resultType) } +// Because the Sparc instruction selector likes to re-write operands to +// instructions, making them change from a Value* (virtual register) to a +// Constant* (making an immediate field), we need to change the opcode from a +// register-based instruction to an immediate-based instruction, hence this +// mapping. static unsigned convertOpcodeFromRegToImm(unsigned Opcode) { switch (Opcode) { -- cgit v1.2.3