From bf61113e4f57dd115e583828afb51b19ea53cf87 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 22 Jul 2018 05:16:49 +0000 Subject: [SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2 number of elements. The check for the shuffles usages probably isn't correct for non power of 2 vectors. llvm-svn: 337651 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'llvm') diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 73a07d56a41..59b0e625baf 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -2668,6 +2668,10 @@ static bool isVectorReductionOp(const User *I) { } unsigned ElemNum = Inst->getType()->getVectorNumElements(); + // Ensure the reduction size is a power of 2. + if (!isPowerOf2_32(ElemNum)) + return false; + unsigned ElemNumToReduce = ElemNum; // Do DFS search on the def-use chain from the given instruction. We only -- cgit v1.2.3