From 9d7cf998ca7de5366e34971c00b5d0e2e16a08d4 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 11 Jan 2005 04:31:30 +0000 Subject: Emit NOT instructions. llvm-svn: 19455 --- llvm/lib/Target/X86/X86ISelPattern.cpp | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'llvm') diff --git a/llvm/lib/Target/X86/X86ISelPattern.cpp b/llvm/lib/Target/X86/X86ISelPattern.cpp index e9531c5db9f..f2edb651ae0 100644 --- a/llvm/lib/Target/X86/X86ISelPattern.cpp +++ b/llvm/lib/Target/X86/X86ISelPattern.cpp @@ -1382,8 +1382,21 @@ unsigned ISel::SelectExpr(SDOperand N) { case ISD::XOR: if (ConstantSDNode *CN = dyn_cast(N.getOperand(1))) { Tmp1 = SelectExpr(N.getOperand(0)); + + if (CN->isAllOnesValue()) { + switch (N.getValueType()) { + default: assert(0 && "Cannot add this type!"); + case MVT::i1: + case MVT::i8: Opc = X86::NOT8r; break; + case MVT::i16: Opc = X86::NOT16r; break; + case MVT::i32: Opc = X86::NOT32r; break; + } + BuildMI(BB, Opc, 1, Result).addReg(Tmp1); + return Result; + } + switch (N.getValueType()) { - default: assert(0 && "Cannot add this type!"); + default: assert(0 && "Cannot xor this type!"); case MVT::i1: case MVT::i8: Opc = X86::XOR8ri; break; case MVT::i16: Opc = X86::XOR16ri; break; -- cgit v1.2.3