From fb81b93e175f355d3ee96a85c86ac27d75d8c7a9 Mon Sep 17 00:00:00 2001 From: Elena Demikhovsky Date: Thu, 25 Dec 2014 07:49:20 +0000 Subject: Masked Load/Store - Changed the order of parameters in intrinsics. No functional changes. The documentation is coming. llvm-svn: 224829 --- llvm/utils/TableGen/CodeGenTarget.cpp | 3 ++- llvm/utils/TableGen/IntrinsicEmitter.cpp | 6 +++++- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'llvm/utils') diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index 1f13a20c8d9..c4d30e924b6 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -531,7 +531,8 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { // overloaded, all the types can be specified directly. assert(((!TyEl->isSubClassOf("LLVMExtendedType") && !TyEl->isSubClassOf("LLVMTruncatedType") && - !TyEl->isSubClassOf("LLVMVectorSameWidth")) || + !TyEl->isSubClassOf("LLVMVectorSameWidth") && + !TyEl->isSubClassOf("LLVMPointerToElt")) || VT == MVT::iAny || VT == MVT::vAny) && "Expected iAny or vAny type"); } else diff --git a/llvm/utils/TableGen/IntrinsicEmitter.cpp b/llvm/utils/TableGen/IntrinsicEmitter.cpp index dcf4b80e4ef..c0cf92d7618 100644 --- a/llvm/utils/TableGen/IntrinsicEmitter.cpp +++ b/llvm/utils/TableGen/IntrinsicEmitter.cpp @@ -258,7 +258,8 @@ enum IIT_Info { IIT_V1 = 27, IIT_VARARG = 28, IIT_HALF_VEC_ARG = 29, - IIT_SAME_VEC_WIDTH_ARG = 30 + IIT_SAME_VEC_WIDTH_ARG = 30, + IIT_PTR_TO_ARG = 31 }; @@ -313,6 +314,9 @@ static void EncodeFixedType(Record *R, std::vector &ArgCodes, EncodeFixedValueType(VT, Sig); return; } + else if (R->isSubClassOf("LLVMPointerTo")) { + Sig.push_back(IIT_PTR_TO_ARG); + } else Sig.push_back(IIT_ARG); return Sig.push_back((Number << 2) | ArgCodes[Number]); -- cgit v1.2.3