From 8a9c91de33b42adfb98e082bc5d221e7eae5b179 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Mon, 6 Nov 2006 21:44:54 +0000
Subject: recognize ppc's blr instruction as predicated

llvm-svn: 31480
---
 llvm/utils/TableGen/CodeGenInstruction.h | 1 +
 llvm/utils/TableGen/CodeGenTarget.cpp    | 2 ++
 llvm/utils/TableGen/InstrInfoEmitter.cpp | 1 +
 3 files changed, 4 insertions(+)

(limited to 'llvm/utils/TableGen')

diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index e1c4c7d6d31..26423d02ffc 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -87,6 +87,7 @@ namespace llvm {
     bool isLoad;
     bool isStore;
     bool isTwoAddress;
+    bool isPredicated;
     bool isConvertibleToThreeAddress;
     bool isCommutable;
     bool isTerminator;
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index f8410c17ff4..5893a58623a 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -335,6 +335,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   isLoad       = R->getValueAsBit("isLoad");
   isStore      = R->getValueAsBit("isStore");
   isTwoAddress = R->getValueAsBit("isTwoAddress");
+  isPredicated = false;   // set below.
   isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
   isCommutable = R->getValueAsBit("isCommutable");
   isTerminator = R->getValueAsBit("isTerminator");
@@ -381,6 +382,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
       if (unsigned NumArgs = MIOpInfo->getNumArgs())
         NumOps = NumArgs;
 
+      isPredicated |= Rec->isSubClassOf("PredicateOperand");
     } else if (Rec->getName() == "variable_ops") {
       hasVariableNumberOfOperands = true;
       continue;
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index bf69d08523a..41fb6969944 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -225,6 +225,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.isLoad)       OS << "|M_LOAD_FLAG";
   if (Inst.isStore || isStore) OS << "|M_STORE_FLAG";
   if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
+  if (Inst.isPredicated) OS << "|M_PREDICATED";
   if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
   if (Inst.isCommutable) OS << "|M_COMMUTABLE";
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
-- 
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