From ab588efe420a9c3f9ad820d40db88f557661acdc Mon Sep 17 00:00:00 2001
From: Kay Tiong Khoo <kkhoo@perfwizard.com>
Date: Tue, 12 Feb 2013 00:19:12 +0000
Subject: Added 0x0D to 2-byte opcode extension table for prefetch* variants
 Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to
 add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920
---
 llvm/utils/TableGen/X86RecognizableInstr.cpp | 1 +
 1 file changed, 1 insertion(+)

(limited to 'llvm/utils/TableGen/X86RecognizableInstr.cpp')

diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index b99a6eb87ee..b00f7ea2bad 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -119,6 +119,7 @@ namespace X86Local {
 #define TWO_BYTE_EXTENSION_TABLES \
   EXTENSION_TABLE(00)             \
   EXTENSION_TABLE(01)             \
+  EXTENSION_TABLE(0d)             \
   EXTENSION_TABLE(18)             \
   EXTENSION_TABLE(71)             \
   EXTENSION_TABLE(72)             \
-- 
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