From 3484fc21619daf38a97fe7b103bd5dbfd14e8540 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 5 Jan 2014 04:17:28 +0000 Subject: Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions. llvm-svn: 198543 --- llvm/utils/TableGen/X86RecognizableInstr.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'llvm/utils/TableGen/X86RecognizableInstr.cpp') diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp index d9ad2696238..2fac3519d2b 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.cpp +++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp @@ -248,6 +248,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables, HasEVEX_B = Rec->getValueAsBit("hasEVEX_B"); HasLockPrefix = Rec->getValueAsBit("hasLockPrefix"); IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly"); + ForceDisassemble = Rec->getValueAsBit("ForceDisassemble"); Name = Rec->getName(); AsmString = Rec->getValueAsString("AsmString"); @@ -483,7 +484,7 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { assert(Rec->isSubClassOf("X86Inst") && "Can only filter X86 instructions"); if (Form == X86Local::Pseudo || - (IsCodeGenOnly && Name.find("_REV") == Name.npos && + (IsCodeGenOnly && !ForceDisassemble && Name.find("INC32") == Name.npos && Name.find("DEC32") == Name.npos)) return FILTER_STRONG; -- cgit v1.2.3