From c313d0b712eb1afc11eac533de6e97543f98092d Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Fri, 3 Mar 2006 02:32:46 +0000
Subject: initial implementation of intrinsic parsing

llvm-svn: 26495
---
 llvm/utils/TableGen/TableGen.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'llvm/utils/TableGen/TableGen.cpp')

diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp
index 366af85bc6e..4c8b3a0fcd3 100644
--- a/llvm/utils/TableGen/TableGen.cpp
+++ b/llvm/utils/TableGen/TableGen.cpp
@@ -25,6 +25,7 @@
 #include "AsmWriterEmitter.h"
 #include "DAGISelEmitter.h"
 #include "SubtargetEmitter.h"
+#include "IntrinsicEmitter.h"
 #include <algorithm>
 #include <cstdio>
 #include <fstream>
@@ -38,6 +39,7 @@ enum ActionType {
   GenInstrEnums, GenInstrs, GenAsmWriter, 
   GenDAGISel,
   GenSubtarget,
+  GenIntrinsic,
   PrintEnums,
   Parse
 };
@@ -65,6 +67,8 @@ namespace {
                                "Generate a DAG instruction selector"),
                     clEnumValN(GenSubtarget, "gen-subtarget",
                                "Generate subtarget enumerations"),
+                    clEnumValN(GenIntrinsic, "gen-intrinsic",
+                               "Generate intrinsic information"),
                     clEnumValN(PrintEnums, "print-enums",
                                "Print enum values for a class"),
                     clEnumValN(Parse, "parse",
@@ -474,6 +478,9 @@ int main(int argc, char **argv) {
     case GenSubtarget:
       SubtargetEmitter(Records).run(*Out);
       break;
+    case GenIntrinsic:
+      IntrinsicEmitter(Records).run(*Out);
+      break;
     case PrintEnums:
     {
       std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
-- 
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