From 801e0a3fdebc6c2d22706967874a572846f3e5d8 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 22 Jul 2011 23:16:18 +0000 Subject: ARM SSAT instruction 5-bit immediate handling. The immediate is in the range 1-32, but is encoded as 0-31 in a 5-bit bitfield. Update the representation such that we store the operand as 0-31, allowing us to remove the encoder method and the special case handling in the disassembler. Update the assembly parser and the instruction printer accordingly. llvm-svn: 135823 --- llvm/utils/TableGen/EDEmitter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/utils/TableGen/EDEmitter.cpp') diff --git a/llvm/utils/TableGen/EDEmitter.cpp b/llvm/utils/TableGen/EDEmitter.cpp index 7569e5576c9..3001192e7f8 100644 --- a/llvm/utils/TableGen/EDEmitter.cpp +++ b/llvm/utils/TableGen/EDEmitter.cpp @@ -587,6 +587,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type, IMM("neg_zero"); IMM("imm0_31"); IMM("imm0_31_m1"); + IMM("imm1_32"); IMM("nModImm"); IMM("imm0_7"); IMM("imm0_15"); @@ -603,7 +604,6 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type, IMM("t_adrlabel"); IMM("t2adrlabel"); IMM("shift_imm"); - IMM("ssat_imm"); IMM("neon_vcvt_imm32"); IMM("shr_imm8"); IMM("shr_imm16"); -- cgit v1.2.3