From 8a9cb242fb1a5fef9103a6df15d601ede83dba0b Mon Sep 17 00:00:00 2001 From: Wouter van Oortmerssen Date: Mon, 27 Aug 2018 15:45:51 +0000 Subject: [WebAssembly] Added default stack-only instruction mode for MC. Summary: Made it convert from register to stack based instructions, and removed the registers. Fixes to related code that was expecting register based instructions. Added the correct testing flag to all tests, depending on what the format they were expecting so far. Translated one test to stack format as example: reg-stackify-stack.ll tested: llvm-lit -v `find test -name WebAssembly` unittests/MC/* Reviewers: dschuff, sunfish Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits, jfb Differential Revision: https://reviews.llvm.org/D51241 llvm-svn: 340750 --- llvm/unittests/MC/Disassembler.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/unittests/MC/Disassembler.cpp') diff --git a/llvm/unittests/MC/Disassembler.cpp b/llvm/unittests/MC/Disassembler.cpp index 0a6871f6f85..ca9581af83a 100644 --- a/llvm/unittests/MC/Disassembler.cpp +++ b/llvm/unittests/MC/Disassembler.cpp @@ -101,7 +101,7 @@ TEST(Disassembler, WebAssemblyTest) { InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString, OutStringSize); EXPECT_EQ(InstSize, 3U); - EXPECT_EQ(StringRef(OutString), "\ti64.load32_u\t16, :p2align=1"); + EXPECT_EQ(StringRef(OutString), "\ti64.load32_u\t16:p2align=1"); LLVMDisasmDispose(DCR); } -- cgit v1.2.3