From cf2f4b32512f2c5fdd2e39aa1bbb76a563afd19d Mon Sep 17 00:00:00 2001 From: Zhan Jun Liau Date: Thu, 18 Aug 2016 21:44:15 +0000 Subject: [SystemZ] Use valid base/index regs for inline asm Summary: Inline asm memory constraints can have the base or index register be assigned to %r0 right now. Make sure that we assign only ADDR64 registers to the base and index. Reviewers: uweigand Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23367 llvm-svn: 279157 --- llvm/test/CodeGen/SystemZ/asm-02.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/test') diff --git a/llvm/test/CodeGen/SystemZ/asm-02.ll b/llvm/test/CodeGen/SystemZ/asm-02.ll index 426d8488290..c916d827cde 100644 --- a/llvm/test/CodeGen/SystemZ/asm-02.ll +++ b/llvm/test/CodeGen/SystemZ/asm-02.ll @@ -74,8 +74,8 @@ define void @f6(i64 %base, i64 %index) { ; Check that LAY is used if there is an index but the displacement is too large define void @f7(i64 %base, i64 %index) { ; CHECK-LABEL: f7: -; CHECK: lay %r0, 4096(%r3,%r2) -; CHECK: blah 0(%r0) +; CHECK: lay %r1, 4096(%r3,%r2) +; CHECK: blah 0(%r1) ; CHECK: br %r14 %add = add i64 %base, 4096 %addi = add i64 %add, %index -- cgit v1.2.3