From b53ccb8e36fcb68fb87043db032046f34b66c76f Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 17 Apr 2011 20:23:29 +0000 Subject: 1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll 2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. llvm-svn: 129666 --- llvm/test/CodeGen/X86/fast-isel-shift-imm.ll | 8 ------- llvm/test/CodeGen/X86/fast-isel-x86-64.ll | 34 +++++++++++++++++++++++++++- llvm/test/CodeGen/X86/lock-inst-encoding.ll | 6 ++--- 3 files changed, 36 insertions(+), 12 deletions(-) delete mode 100644 llvm/test/CodeGen/X86/fast-isel-shift-imm.ll (limited to 'llvm/test') diff --git a/llvm/test/CodeGen/X86/fast-isel-shift-imm.ll b/llvm/test/CodeGen/X86/fast-isel-shift-imm.ll deleted file mode 100644 index 5c62c188051..00000000000 --- a/llvm/test/CodeGen/X86/fast-isel-shift-imm.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=x86 -O0 | grep {sarl \$80, %e} -; PR3242 - -define void @foo(i32 %x, i32* %p) nounwind { - %y = ashr i32 %x, 50000 - store i32 %y, i32* %p - ret void -} diff --git a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll index e98c4730af7..e74fd30b644 100644 --- a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll +++ b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -fast-isel -O0 -regalloc=fast | FileCheck %s +; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.0.0" @@ -61,3 +61,35 @@ define i32 @test4(i64 %idxprom9) nounwind { ; CHECK-NEXT: movzbl (%rax,%rdi), %eax ; CHECK-NEXT: ret } + + +; PR3242 - Out of range shifts should not be folded by fastisel. +define void @test5(i32 %x, i32* %p) nounwind { + %y = ashr i32 %x, 50000 + store i32 %y, i32* %p + ret void + +; CHECK: test5: +; CHECK: movl $50000, %ecx +; CHECK: sarl %cl, %edi +; CHECK: ret +} + +; rdar://9289501 - fast isel should fold trivial multiplies to shifts. +define i64 @test6(i64 %x) nounwind ssp { +entry: + %mul = mul nsw i64 %x, 8 + ret i64 %mul + +; CHECK: test6: +; CHECK: leaq (,%rdi,8), %rax +} + +define i32 @test7(i32 %x) nounwind ssp { +entry: + %mul = mul nsw i32 %x, 8 + ret i32 %mul +; CHECK: test7: +; CHECK: leal (,%rdi,8), %eax +} + diff --git a/llvm/test/CodeGen/X86/lock-inst-encoding.ll b/llvm/test/CodeGen/X86/lock-inst-encoding.ll index 03468e2b3f4..159aeeeca1a 100644 --- a/llvm/test/CodeGen/X86/lock-inst-encoding.ll +++ b/llvm/test/CodeGen/X86/lock-inst-encoding.ll @@ -4,10 +4,10 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin10.0.0" ; CHECK: f0: -; CHECK: addq %rax, (%rdi) -; CHECK: # encoding: [0xf0,0x48,0x01,0x07] +; CHECK: addq %rcx, (%rdi) +; CHECK: # encoding: [0xf0,0x48,0x01,0x0f] ; CHECK: ret -define void @f0(i64* %a0) { +define void @f0(i64* %a0) nounwind { %t0 = and i64 1, 1 call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true) nounwind %1 = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %a0, i64 %t0) nounwind -- cgit v1.2.3