From 5ed84cdba8351f86de6247410dcfc2ebdc88708c Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Sat, 16 May 2015 01:02:12 +0000 Subject: [PPC64] Add vector pack/unpack support from ISA 2.07 This patch adds support for the following new instructions in the Power ISA 2.07: vpksdss vpksdus vpkudus vpkudum vupkhsw vupklsw These instructions are available through the vec_packs, vec_packsu, vec_unpackh, and vec_unpackl built-in interfaces. These are lane-sensitive instructions, so the built-ins have different implementations for big- and little-endian, and the instructions must be marked as killing the vector swap optimization for now. The first three instructions perform saturating pack operations. The fourth performs a modulo pack operation, which means it can be represented with a vector shuffle, and conversely the appropriate vector shuffles may cause this instruction to be generated. The other instructions are only generated via built-in support for now. Appropriate tests have been added. There is a companion patch to clang for the rest of this support. llvm-svn: 237499 --- llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll | 43 ++++++++++++++++++++++ .../CodeGen/PowerPC/vec_shuffle_p8vector_le.ll | 43 ++++++++++++++++++++++ .../PowerPC/ppc64-encoding-p8vector.txt | 19 ++++++++++ llvm/test/MC/PowerPC/ppc64-encoding-p8vector.s | 26 +++++++++++++ 4 files changed, 131 insertions(+) create mode 100644 llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll create mode 100644 llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector_le.ll create mode 100644 llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8vector.txt create mode 100644 llvm/test/MC/PowerPC/ppc64-encoding-p8vector.s (limited to 'llvm/test') diff --git a/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll b/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll new file mode 100644 index 00000000000..d81aa729f8e --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector.ll @@ -0,0 +1,43 @@ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu -mattr=+power8-vector < %s | FileCheck %s + +define void @VPKUDUM_unary(<2 x i64>* %A) { +entry: + %tmp = load <2 x i64>, <2 x i64>* %A + %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> + %tmp3 = extractelement <4 x i32> %tmp2, i32 1 + %tmp4 = extractelement <4 x i32> %tmp2, i32 3 + %tmp5 = insertelement <4 x i32> undef, i32 %tmp3, i32 0 + %tmp6 = insertelement <4 x i32> %tmp5, i32 %tmp4, i32 1 + %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 2 + %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 3 + %tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64> + store <2 x i64> %tmp9, <2 x i64>* %A + ret void +} + +; CHECK-LABEL: @VPKUDUM_unary +; CHECK-NOT: vperm +; CHECK: vpkudum + +define void @VPKUDUM(<2 x i64>* %A, <2 x i64>* %B) { +entry: + %tmp = load <2 x i64>, <2 x i64>* %A + %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> + %tmp3 = load <2 x i64>, <2 x i64>* %B + %tmp4 = bitcast <2 x i64> %tmp3 to <4 x i32> + %tmp5 = extractelement <4 x i32> %tmp2, i32 1 + %tmp6 = extractelement <4 x i32> %tmp2, i32 3 + %tmp7 = extractelement <4 x i32> %tmp4, i32 1 + %tmp8 = extractelement <4 x i32> %tmp4, i32 3 + %tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0 + %tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1 + %tmp11 = insertelement <4 x i32> %tmp10, i32 %tmp7, i32 2 + %tmp12 = insertelement <4 x i32> %tmp11, i32 %tmp8, i32 3 + %tmp13 = bitcast <4 x i32> %tmp12 to <2 x i64> + store <2 x i64> %tmp13, <2 x i64>* %A + ret void +} + +; CHECK-LABEL: @VPKUDUM +; CHECK-NOT: vperm +; CHECK: vpkudum diff --git a/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector_le.ll b/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector_le.ll new file mode 100644 index 00000000000..709388675f6 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector_le.ll @@ -0,0 +1,43 @@ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+power8-vector < %s | FileCheck %s + +define void @VPKUDUM_unary(<2 x i64>* %A) { +entry: + %tmp = load <2 x i64>, <2 x i64>* %A + %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> + %tmp3 = extractelement <4 x i32> %tmp2, i32 0 + %tmp4 = extractelement <4 x i32> %tmp2, i32 2 + %tmp5 = insertelement <4 x i32> undef, i32 %tmp3, i32 0 + %tmp6 = insertelement <4 x i32> %tmp5, i32 %tmp4, i32 1 + %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 2 + %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 3 + %tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64> + store <2 x i64> %tmp9, <2 x i64>* %A + ret void +} + +; CHECK-LABEL: @VPKUDUM_unary +; CHECK-NOT: vperm +; CHECK: vpkudum + +define void @VPKUDUM(<2 x i64>* %A, <2 x i64>* %B) { +entry: + %tmp = load <2 x i64>, <2 x i64>* %A + %tmp2 = bitcast <2 x i64> %tmp to <4 x i32> + %tmp3 = load <2 x i64>, <2 x i64>* %B + %tmp4 = bitcast <2 x i64> %tmp3 to <4 x i32> + %tmp5 = extractelement <4 x i32> %tmp2, i32 0 + %tmp6 = extractelement <4 x i32> %tmp2, i32 2 + %tmp7 = extractelement <4 x i32> %tmp4, i32 0 + %tmp8 = extractelement <4 x i32> %tmp4, i32 2 + %tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0 + %tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1 + %tmp11 = insertelement <4 x i32> %tmp10, i32 %tmp7, i32 2 + %tmp12 = insertelement <4 x i32> %tmp11, i32 %tmp8, i32 3 + %tmp13 = bitcast <4 x i32> %tmp12 to <2 x i64> + store <2 x i64> %tmp13, <2 x i64>* %A + ret void +} + +; CHECK-LABEL: @VPKUDUM +; CHECK-NOT: vperm +; CHECK: vpkudum diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8vector.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8vector.txt new file mode 100644 index 00000000000..eeea2db673f --- /dev/null +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-p8vector.txt @@ -0,0 +1,19 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr8 | FileCheck %s + +# CHECK: vpksdss 2, 3, 4 +0x10 0x43 0x25 0xce + +# CHECK: vpksdus 2, 3, 4 +0x10 0x43 0x25 0x4e + +# CHECK: vpkudus 2, 3, 4 +0x10 0x43 0x24 0xce + +# CHECK: vpkudum 2, 3, 4 +0x10 0x43 0x24 0x4e + +# CHECK: vupkhsw 2, 3 +0x10 0x40 0x1e 0x4e + +# CHECK: vupklsw 2, 3 +0x10 0x40 0x1e 0xce diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-p8vector.s b/llvm/test/MC/PowerPC/ppc64-encoding-p8vector.s new file mode 100644 index 00000000000..657b7378fb4 --- /dev/null +++ b/llvm/test/MC/PowerPC/ppc64-encoding-p8vector.s @@ -0,0 +1,26 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# CHECK-BE: vpksdss 2, 3, 4 # encoding: [0x10,0x43,0x25,0xce] +# CHECK-LE: vpksdss 2, 3, 4 # encoding: [0xce,0x25,0x43,0x10] + vpksdss 2, 3, 4 + +# CHECK-BE: vpksdus 2, 3, 4 # encoding: [0x10,0x43,0x25,0x4e] +# CHECK-LE: vpksdus 2, 3, 4 # encoding: [0x4e,0x25,0x43,0x10] + vpksdus 2, 3, 4 + +# CHECK-BE: vpkudus 2, 3, 4 # encoding: [0x10,0x43,0x24,0xce] +# CHECK-LE: vpkudus 2, 3, 4 # encoding: [0xce,0x24,0x43,0x10] + vpkudus 2, 3, 4 + +# CHECK-BE: vpkudum 2, 3, 4 # encoding: [0x10,0x43,0x24,0x4e] +# CHECK-LE: vpkudum 2, 3, 4 # encoding: [0x4e,0x24,0x43,0x10] + vpkudum 2, 3, 4 + +# CHECK-BE: vupkhsw 2, 3 # encoding: [0x10,0x40,0x1e,0x4e] +# CHECK-LE: vupkhsw 2, 3 # encoding: [0x4e,0x1e,0x40,0x10] + vupkhsw 2, 3 + +# CHECK-BE: vupklsw 2, 3 # encoding: [0x10,0x40,0x1e,0xce] +# CHECK-LE: vupklsw 2, 3 # encoding: [0xce,0x1e,0x40,0x10] + vupklsw 2, 3 -- cgit v1.2.3