From 1bc8af207ef075bea5dce5fd98ec45918a8dcad6 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Tue, 27 Jan 2009 03:30:42 +0000 Subject: Implement multiple with overflow by 2 with an add instruction. llvm-svn: 63090 --- llvm/test/CodeGen/X86/smul-with-overflow-2.ll | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 llvm/test/CodeGen/X86/smul-with-overflow-2.ll (limited to 'llvm/test') diff --git a/llvm/test/CodeGen/X86/smul-with-overflow-2.ll b/llvm/test/CodeGen/X86/smul-with-overflow-2.ll new file mode 100644 index 00000000000..c3dbfd796f2 --- /dev/null +++ b/llvm/test/CodeGen/X86/smul-with-overflow-2.ll @@ -0,0 +1,20 @@ +; RUN: llvm-as < %s | llc -march=x86 | grep mul | count 1 +; RUN: llvm-as < %s | llc -march=x86 | grep add | count 3 + +define i32 @t1(i32 %a, i32 %b) nounwind readnone { +entry: + %tmp0 = add i32 %b, %a + %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 2) + %tmp2 = extractvalue { i32, i1 } %tmp1, 0 + ret i32 %tmp2 +} + +define i32 @t2(i32 %a, i32 %b) nounwind readnone { +entry: + %tmp0 = add i32 %b, %a + %tmp1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %tmp0, i32 4) + %tmp2 = extractvalue { i32, i1 } %tmp1, 0 + ret i32 %tmp2 +} + +declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32) nounwind -- cgit v1.2.3