From 0e5eaae1cbc18c349a6cbe135ab64a3b0c59d377 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Fri, 4 Apr 2014 14:49:30 +0000 Subject: DAGLegalize: add last-ditch type-legalization for VSELECT. When LLVM sees something like (v1iN (vselect v1i1, v1iN, v1iN)) it can decide that the result is OK (v1i64 is legal on AArch64, for example) but it still need scalarising because of that v1i1. There was no code to do this though. AArch64 and ARM64 have DAG combines to produce efficient code and prevent that occuring in *most* such situations, but there are edge cases that they miss. This adds a legalization to cope with that. llvm-svn: 205626 --- llvm/test/CodeGen/ARM64/neon-v1i1-setcc.ll | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/test') diff --git a/llvm/test/CodeGen/ARM64/neon-v1i1-setcc.ll b/llvm/test/CodeGen/ARM64/neon-v1i1-setcc.ll index a7e59fbc002..d7a0771f7b1 100644 --- a/llvm/test/CodeGen/ARM64/neon-v1i1-setcc.ll +++ b/llvm/test/CodeGen/ARM64/neon-v1i1-setcc.ll @@ -50,6 +50,15 @@ define <1 x double> @test_select_v1i1_2(<1 x i64> %v1, <1 x i64> %v2, <1 x doubl ret <1 x double> %res } +define <1 x i64> @test_select_v1i1_3(i64 %lhs, i64 %rhs, <1 x i64> %v3) { +; CHECK-LABEL: test_select_v1i1_3: +; CHECK: cmp {{x[0-9]+}}, {{x[0-9]+}} + %tst = icmp eq i64 %lhs, %rhs + %evil = insertelement <1 x i1> undef, i1 %tst, i32 0 + %res = select <1 x i1> %evil, <1 x i64> zeroinitializer, <1 x i64> %v3 + ret <1 x i64> %res +} + define i32 @test_br_extr_cmp(<1 x i64> %v1, <1 x i64> %v2) { ; CHECK-LABEL: test_br_extr_cmp: ; CHECK: cmp x{{[0-9]+}}, x{{[0-9]+}} -- cgit v1.2.3