From 3acfddd6b5a7e39c35616a2af3df1fe2b6f482d4 Mon Sep 17 00:00:00 2001
From: Colin LeMahieu <colinl@codeaurora.org>
Date: Mon, 5 Jan 2015 20:14:58 +0000
Subject: [Hexagon] Adding V4 logic-logic instructions and tests.

llvm-svn: 225198
---
 llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt | 26 +++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

(limited to 'llvm/test/MC')

diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
index 3f9f989a148..7d25fdbcf2c 100644
--- a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
@@ -64,10 +64,36 @@
 # CHECK: r17:16 = or(r21:20, ~r31:30)
 0x10 0xde 0x94 0xca
 # CHECK: r17:16 ^= xor(r21:20, r31:30)
+0xf1 0xc3 0x15 0xda
+# CHECK: r17 |= and(r21, #31)
 0xf5 0xc3 0x51 0xda
 # CHECK: r17 = or(r21, and(r17, #31))
+0xf1 0xc3 0x95 0xda
+# CHECK: r17 |= or(r21, #31)
+0x11 0xdf 0x35 0xef
+# CHECK: r17 |= and(r21, ~r31)
+0x31 0xdf 0x35 0xef
+# CHECK: r17 &= and(r21, ~r31)
+0x51 0xdf 0x35 0xef
+# CHECK: r17 ^= and(r21, ~r31)
+0x11 0xdf 0x55 0xef
+# CHECK: r17 &= and(r21, r31)
+0x31 0xdf 0x55 0xef
+# CHECK: r17 &= or(r21, r31)
+0x51 0xdf 0x55 0xef
+# CHECK: r17 &= xor(r21, r31)
+0x71 0xdf 0x55 0xef
+# CHECK: r17 |= and(r21, r31)
 0x71 0xdf 0x95 0xef
 # CHECK: r17 ^= xor(r21, r31)
+0x11 0xdf 0xd5 0xef
+# CHECK: r17 |= or(r21, r31)
+0x31 0xdf 0xd5 0xef
+# CHECK: r17 |= xor(r21, r31)
+0x51 0xdf 0xd5 0xef
+# CHECK: r17 ^= and(r21, r31)
+0x71 0xdf 0xd5 0xef
+# CHECK: r17 ^= or(r21, r31)
 0x11 0xdf 0xd5 0xd5
 # CHECK: r17 = max(r21, r31)
 0x91 0xdf 0xd5 0xd5
-- 
cgit v1.2.3