From 30895f9ab8cd9ce82f695147dc517fd44b8a21dd Mon Sep 17 00:00:00 2001 From: Charlie Turner Date: Mon, 1 Dec 2014 08:50:27 +0000 Subject: Add post-decode checking of HVC instruction. Add checkDecodedInstruction for post-decode checking of instructions, to catch the corner cases like HVC that don't fit into the general pattern. Needed to check for an invalid condition field in instruction encoding despite HVC not taking a predicate. Patch by Matthew Wahab. Change-Id: I48e28de981d7a9e43569594da3c45fb478b4f795 llvm-svn: 222992 --- llvm/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 llvm/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt (limited to 'llvm/test/MC/Disassembler/ARM') diff --git a/llvm/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt new file mode 100644 index 00000000000..1daada98d67 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/invalid-virtexts.arm.txt @@ -0,0 +1,10 @@ +# RUN: not llvm-mc -disassemble -triple armv7a -mcpu=cortex-a15 %s 2>&1 | FileCheck --check-prefix=CHECK-ARM %s + +# HVC (ARM) +[0x7f,0xff,0x4f,0xf1] +# CHECK-ARM: warning: invalid instruction encoding + +[0x70,0xff,0x4f,0x01] +[0x7f,0xff,0x4f,0xd1] +# CHECK-ARM: warning: potentially undefined instruction encoding +# CHECK-ARM: warning: potentially undefined instruction encoding -- cgit v1.2.3