From a79ac14fa68297f9888bc70a10df5ed9b8864e38 Mon Sep 17 00:00:00 2001 From: David Blaikie Date: Fri, 27 Feb 2015 21:17:42 +0000 Subject: [opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794 --- llvm/test/DebugInfo/X86/ending-run.ll | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'llvm/test/DebugInfo/X86/ending-run.ll') diff --git a/llvm/test/DebugInfo/X86/ending-run.ll b/llvm/test/DebugInfo/X86/ending-run.ll index 0b5c77fea6e..f407616a220 100644 --- a/llvm/test/DebugInfo/X86/ending-run.ll +++ b/llvm/test/DebugInfo/X86/ending-run.ll @@ -15,11 +15,11 @@ entry: store i32 %x, i32* %x.addr, align 4 call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !12, metadata !{!"0x102"}), !dbg !13 call void @llvm.dbg.declare(metadata i32* %y, metadata !14, metadata !{!"0x102"}), !dbg !16 - %0 = load i32* %x.addr, align 4, !dbg !17 - %1 = load i32* %x.addr, align 4, !dbg !17 + %0 = load i32, i32* %x.addr, align 4, !dbg !17 + %1 = load i32, i32* %x.addr, align 4, !dbg !17 %mul = mul nsw i32 %0, %1, !dbg !17 store i32 %mul, i32* %y, align 4, !dbg !17 - %2 = load i32* %y, align 4, !dbg !18 + %2 = load i32, i32* %y, align 4, !dbg !18 %sub = sub nsw i32 %2, 2, !dbg !18 ret i32 %sub, !dbg !18 } -- cgit v1.2.3