From a79ac14fa68297f9888bc70a10df5ed9b8864e38 Mon Sep 17 00:00:00 2001
From: David Blaikie <dblaikie@gmail.com>
Date: Fri, 27 Feb 2015 21:17:42 +0000
Subject: [opaque pointer type] Add textual IR support for explicit type
 parameter to load instruction

Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
---
 llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll')

diff --git a/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll b/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
index ce52d24aa7f..05990e49149 100644
--- a/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
+++ b/llvm/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll
@@ -29,7 +29,7 @@ entry:
   call void @llvm.dbg.declare(metadata %class.A* %b, metadata !0, metadata !{!"0x102"}), !dbg !14
   %call = call i32 @_ZN1B2fnEv(%class.A* %b), !dbg !15 ; <i32> [#uses=1]
   store i32 %call, i32* %retval, !dbg !15
-  %0 = load i32* %retval, !dbg !16                ; <i32> [#uses=1]
+  %0 = load i32, i32* %retval, !dbg !16                ; <i32> [#uses=1]
   ret i32 %0, !dbg !16
 }
 
@@ -43,14 +43,14 @@ entry:
   %i = alloca i32, align 4                        ; <i32*> [#uses=2]
   store %class.A* %this, %class.A** %this.addr
   call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !17, metadata !{!"0x102"}), !dbg !18
-  %this1 = load %class.A** %this.addr             ; <%class.A*> [#uses=0]
+  %this1 = load %class.A*, %class.A** %this.addr             ; <%class.A*> [#uses=0]
   call void @llvm.dbg.declare(metadata %class.A* %a, metadata !19, metadata !{!"0x102"}), !dbg !27
   call void @llvm.dbg.declare(metadata i32* %i, metadata !28, metadata !{!"0x102"}), !dbg !29
   %call = call i32 @_ZZN1B2fnEvEN1A3fooEv(%class.A* %a), !dbg !30 ; <i32> [#uses=1]
   store i32 %call, i32* %i, !dbg !30
-  %tmp = load i32* %i, !dbg !31                   ; <i32> [#uses=1]
+  %tmp = load i32, i32* %i, !dbg !31                   ; <i32> [#uses=1]
   store i32 %tmp, i32* %retval, !dbg !31
-  %0 = load i32* %retval, !dbg !32                ; <i32> [#uses=1]
+  %0 = load i32, i32* %retval, !dbg !32                ; <i32> [#uses=1]
   ret i32 %0, !dbg !32
 }
 
@@ -60,9 +60,9 @@ entry:
   %this.addr = alloca %class.A*, align 8          ; <%class.A**> [#uses=2]
   store %class.A* %this, %class.A** %this.addr
   call void @llvm.dbg.declare(metadata %class.A** %this.addr, metadata !33, metadata !{!"0x102"}), !dbg !34
-  %this1 = load %class.A** %this.addr             ; <%class.A*> [#uses=0]
+  %this1 = load %class.A*, %class.A** %this.addr             ; <%class.A*> [#uses=0]
   store i32 42, i32* %retval, !dbg !35
-  %0 = load i32* %retval, !dbg !35                ; <i32> [#uses=1]
+  %0 = load i32, i32* %retval, !dbg !35                ; <i32> [#uses=1]
   ret i32 %0, !dbg !35
 }
 
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