From cf9a61b6eeb12d647b484cbc6eb09d4ca1ca8bb0 Mon Sep 17 00:00:00 2001
From: Akira Hatanaka <ahatanaka@mips.com>
Date: Thu, 13 Dec 2012 03:17:29 +0000
Subject: [mips] Do not copy GOT address to register $gp if the function being
 called has internal linkage.

llvm-svn: 170092
---
 llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll

(limited to 'llvm/test/CodeGen')

diff --git a/llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll b/llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll
new file mode 100644
index 00000000000..85d8d4b1db1
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/gpreg-lazy-binding.ll
@@ -0,0 +1,27 @@
+; RUN: llc -march=mipsel -disable-mips-delay-filler < %s | FileCheck %s 
+
+@g = external global i32
+
+; CHECK:     addu  $gp
+; CHECK:     jalr  $25
+; CHECK:     nop
+; CHECK-NOT: addu  $gp
+; CHECK:     jalr  $25
+
+define void @f0() nounwind {
+entry:
+  tail call void @externalFunc() nounwind
+  tail call fastcc void @internalFunc()
+  ret void
+}
+
+declare void @externalFunc()
+
+define internal fastcc void @internalFunc() nounwind noinline {
+entry:
+  %0 = load i32* @g, align 4
+  %inc = add nsw i32 %0, 1
+  store i32 %inc, i32* @g, align 4
+  ret void
+}
+
-- 
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