From be31585be861e6503bf7401d469d201f707e3f70 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Sun, 4 Mar 2018 01:48:00 +0000
Subject: [X86] Lower v1i1/v2i1/v4i1/v8i1 load/stores to i8 load/store during
 op legalization if AVX512DQ is not supported.

We were previously doing this with isel patterns. Moving it to op legalization gives us chance to see the required bitcast earlier. And it lets us remove some isel patterns.

llvm-svn: 326669
---
 llvm/test/CodeGen/X86/avx512-mask-op.ll | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

(limited to 'llvm/test/CodeGen')

diff --git a/llvm/test/CodeGen/X86/avx512-mask-op.ll b/llvm/test/CodeGen/X86/avx512-mask-op.ll
index 88d5ed4f7ad..1038c90ab9d 100644
--- a/llvm/test/CodeGen/X86/avx512-mask-op.ll
+++ b/llvm/test/CodeGen/X86/avx512-mask-op.ll
@@ -348,9 +348,7 @@ define i8 @zext_test3(<16 x i32> %a, <16 x i32> %b) {
 define i8 @conv1(<8 x i1>* %R) {
 ; KNL-LABEL: conv1:
 ; KNL:       ## %bb.0: ## %entry
-; KNL-NEXT:    kxnorw %k0, %k0, %k0
-; KNL-NEXT:    kmovw %k0, %eax
-; KNL-NEXT:    movb %al, (%rdi)
+; KNL-NEXT:    movb $-1, (%rdi)
 ; KNL-NEXT:    movb $-2, -{{[0-9]+}}(%rsp)
 ; KNL-NEXT:    movb $-2, %al
 ; KNL-NEXT:    retq
@@ -365,9 +363,7 @@ define i8 @conv1(<8 x i1>* %R) {
 ;
 ; AVX512BW-LABEL: conv1:
 ; AVX512BW:       ## %bb.0: ## %entry
-; AVX512BW-NEXT:    kxnorw %k0, %k0, %k0
-; AVX512BW-NEXT:    kmovd %k0, %eax
-; AVX512BW-NEXT:    movb %al, (%rdi)
+; AVX512BW-NEXT:    movb $-1, (%rdi)
 ; AVX512BW-NEXT:    movb $-2, -{{[0-9]+}}(%rsp)
 ; AVX512BW-NEXT:    movb $-2, %al
 ; AVX512BW-NEXT:    retq
-- 
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