From b5c627aba864517300df961027dbc85a9d3c142e Mon Sep 17 00:00:00 2001 From: Luke Cheeseman Date: Fri, 24 Jul 2015 09:31:48 +0000 Subject: When lowering vector shifts a check is performed to see if the value to shift by is an immediate, in this check the value is negated and stored in and int64_t. The value can be -2^63 yet the result cannot be stored in an int64_t and this gives some undefined behaviour causing failures. The negation is only necessary when the values is within a certain range and so it should not need to negate -2^63, this patch introduces this and also a regression test. Differential Revision: http://reviews.llvm.org/D11408 llvm-svn: 243100 --- llvm/test/CodeGen/ARM/neon_vshl_minint.ll | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 llvm/test/CodeGen/ARM/neon_vshl_minint.ll (limited to 'llvm/test/CodeGen') diff --git a/llvm/test/CodeGen/ARM/neon_vshl_minint.ll b/llvm/test/CodeGen/ARM/neon_vshl_minint.ll new file mode 100644 index 00000000000..769eff845fd --- /dev/null +++ b/llvm/test/CodeGen/ARM/neon_vshl_minint.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s +; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s + +define <1 x i64> @vshl_minint() #0 { + entry: + ; CHECK-LABEL: vshl_minint + ; CHECK: vldr + ; CHECK: vshl.u64 + %vshl.i = tail call <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64> undef, <1 x i64> ) + ret <1 x i64> %vshl.i +} + +declare <1 x i64> @llvm.arm.neon.vshiftu.v1i64(<1 x i64>, <1 x i64>) -- cgit v1.2.3