From a8a89c77ea3c16b45763fca6940bbfd3bef7884f Mon Sep 17 00:00:00 2001
From: Simon Atanasyan <simon@atanasyan.com>
Date: Wed, 30 Oct 2019 19:52:16 +0300
Subject: [utils] Reflow asm check generation to tolerate blank lines

This change introduces two fixes. The second fix allows to generate
a test to check the first fix.

- Output `CHECK-EMPTY` prefix for an empty line in ASM output. Before that
  fix `update_llc_test_checks.py` incorrectly emits `CHECK-NEXT: <space>`
  prefix.
- Fix the `ASM_FUNCTION_MIPS_RE` regex to stop on a real function
  epilogue not on an inline assembler prologue and include inline
  assembler code into a test.

Differential Revision: https://reviews.llvm.org/D47192
---
 llvm/test/CodeGen/Mips/inlineasm-constraint-reg64.ll | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

(limited to 'llvm/test/CodeGen')

diff --git a/llvm/test/CodeGen/Mips/inlineasm-constraint-reg64.ll b/llvm/test/CodeGen/Mips/inlineasm-constraint-reg64.ll
index 3b078d6f70d..ae0504980cc 100644
--- a/llvm/test/CodeGen/Mips/inlineasm-constraint-reg64.ll
+++ b/llvm/test/CodeGen/Mips/inlineasm-constraint-reg64.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ;
 ; Register constraint "r" shouldn't take long long unless
 ; The target is 64 bit.
@@ -7,13 +8,25 @@
 
 
 define i32 @main() nounwind {
+; CHECK-LABEL: main:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    daddiu $1, $zero, 7
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    .set push
+; CHECK-NEXT:    .set at
+; CHECK-NEXT:    .set macro
+; CHECK-NEXT:    .set reorder
+; CHECK-EMPTY:
+; CHECK-NEXT:    addiu $1, $1, 3
+; CHECK-EMPTY:
+; CHECK-NEXT:    .set pop
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    jr $ra
+; CHECK-NEXT:    addiu $2, $zero, 0
 entry:
 
 
 ; r with long long
-;CHECK:	#APP
-;CHECK:	addiu ${{[0-9]+}}, ${{[0-9]+}}, 3
-;CHECK:	#NO_APP
   tail call i64 asm sideeffect "addiu $0, $1, $2", "=r,r,i"(i64 7, i64 3) nounwind
   ret i32 0
 }
-- 
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