From 6fe5c294302615875d9975d6f3d38f3b9bb294a2 Mon Sep 17 00:00:00 2001 From: Cameron Zwarich Date: Sat, 2 Apr 2011 02:40:43 +0000 Subject: Do some peephole optimizations to remove pointless VMOVs from Neon to integer registers that arise from argument shuffling with the soft float ABI. These instructions are particularly slow on Cortex A8. This fixes one half of . llvm-svn: 128759 --- llvm/test/CodeGen/ARM/fp-arg-shuffle.ll | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 llvm/test/CodeGen/ARM/fp-arg-shuffle.ll (limited to 'llvm/test/CodeGen') diff --git a/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll b/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll new file mode 100644 index 00000000000..59303ac06da --- /dev/null +++ b/llvm/test/CodeGen/ARM/fp-arg-shuffle.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+neon -float-abi=soft | FileCheck %s + +; CHECK: function1 +; CHECK-NOT: vmov r +define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp { +entry: + %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind + ret double %call +} + +declare double @function2(double, double, double, double, double, double) -- cgit v1.2.3