From 1c1aab99aeb8170471589538e8faa1bc39e379e2 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 2 Mar 2018 16:55:33 +0000 Subject: AMDGPU/GlobalISel: InstrMapping for G_TRUNC llvm-svn: 326588 --- .../AMDGPU/GlobalISel/regbankselect-trunc.mir | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir (limited to 'llvm/test/CodeGen') diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir new file mode 100644 index 00000000000..e9a73e01600 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir @@ -0,0 +1,31 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s +# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s + +--- +name: trunc_i64_to_i32_s +legalized: true + +body: | + bb.0: + liveins: $sgpr0_sgpr1 + ; CHECK-LABEL: name: trunc_i64_to_i32_s + ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 + ; CHECK: [[TRUNC:%[0-9]+]]:sgpr(s32) = G_TRUNC [[COPY]](s32) + %0:_(s32) = COPY $sgpr0 + %1:_(s32) = G_TRUNC %0 +... + +--- +name: trunc_i64_to_i32_v +legalized: true + +body: | + bb.0: + liveins: $vgpr0_vgpr1 + ; CHECK-LABEL: name: trunc_i64_to_i32_v + ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 + ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s32) = G_TRUNC [[COPY]](s32) + %0:_(s32) = COPY $vgpr0 + %1:_(s32) = G_TRUNC %0 +... -- cgit v1.2.3