From 03c0330176ccf6b4ca1464133064beadcc466f3a Mon Sep 17 00:00:00 2001
From: Bruno Cardoso Lopes <bruno.cardoso@gmail.com>
Date: Fri, 12 Nov 2010 00:38:32 +0000
Subject: Enable mips32 mul instruction. Patch by Akira Hatanaka
 <ahatanaka@mips.com>

llvm-svn: 118864
---
 llvm/test/CodeGen/Mips/2010-11-09-Mul.ll | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 llvm/test/CodeGen/Mips/2010-11-09-Mul.ll

(limited to 'llvm/test/CodeGen')

diff --git a/llvm/test/CodeGen/Mips/2010-11-09-Mul.ll b/llvm/test/CodeGen/Mips/2010-11-09-Mul.ll
new file mode 100644
index 00000000000..65a10b5836c
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/2010-11-09-Mul.ll
@@ -0,0 +1,15 @@
+; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s
+
+; CHECK: mul $2, $5, $4
+define i32 @mul1(i32 %a, i32 %b) nounwind readnone {
+entry:
+  %mul = mul i32 %b, %a
+  ret i32 %mul
+}
+
+; CHECK: mul $2, $5, $4
+define i32 @mul2(i32 %a, i32 %b) nounwind readnone {
+entry:
+  %mul = mul nsw i32 %b, %a
+  ret i32 %mul
+}
-- 
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