From 3013b6ae4ac3a6a141483fd5af7b0995ffb8dcec Mon Sep 17 00:00:00 2001
From: Andrew Trick <atrick@apple.com>
Date: Wed, 15 Jun 2011 17:16:12 +0000
Subject: Added -stress-sched flag in the Asserts build. Added a test case for
 handling physreg aliases during pre-RA-sched.

llvm-svn: 133063
---
 llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll

(limited to 'llvm/test/CodeGen/X86')

diff --git a/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
new file mode 100644
index 00000000000..690c27f3ed3
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
@@ -0,0 +1,17 @@
+; RUN: llc < %s -march=x86-64 -stress-sched | FileCheck %s
+; Test interference between physreg aliases during preRAsched.
+; mul wants an operand in AL, but call clobbers it.
+
+define i8 @f(i8 %v1, i8 %v2) nounwind {
+entry:
+; CHECK: callq
+; CHECK: movb %{{.*}}, %al
+; CHECK: mulb
+; CHECK: mulb
+        %rval = tail call i8 @bar() nounwind
+        %m1 = mul i8 %v1, %v2
+        %m2 = mul i8 %m1, %rval
+        ret i8 %m2
+}
+
+declare i8 @bar()
-- 
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