From c9827ab103a7da183a955f2d61b1b19ec0a0ae7d Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Sat, 26 Apr 2014 13:01:03 +0000 Subject: X86: Add patterns for MULHU/MULHS of v8i16 and v16i16. This gets us pretty code for divs of i16 vectors. Turn the existing intrinsics into the corresponding nodes. llvm-svn: 207317 --- llvm/test/CodeGen/X86/vector-idiv.ll | 61 ++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'llvm/test/CodeGen/X86/vector-idiv.ll') diff --git a/llvm/test/CodeGen/X86/vector-idiv.ll b/llvm/test/CodeGen/X86/vector-idiv.ll index 5b8153a9685..0d43b96163d 100644 --- a/llvm/test/CodeGen/X86/vector-idiv.ll +++ b/llvm/test/CodeGen/X86/vector-idiv.ll @@ -42,4 +42,65 @@ define <8 x i32> @test2(<8 x i32> %a) { ; AVX: vpsrld $2 } +define <8 x i16> @test3(<8 x i16> %a) { + %div = udiv <8 x i16> %a, + ret <8 x i16> %div + +; SSE-LABEL: test3: +; SSE: pmulhuw +; SSE: psubw +; SSE: psrlw $1 +; SSE: paddw +; SSE: psrlw $2 + +; AVX-LABEL: test3: +; AVX: vpmulhuw +; AVX: vpsubw +; AVX: vpsrlw $1 +; AVX: vpaddw +; AVX: vpsrlw $2 +} + +define <16 x i16> @test4(<16 x i16> %a) { + %div = udiv <16 x i16> %a, + ret <16 x i16> %div + +; AVX-LABEL: test4: +; AVX: vpmulhuw +; AVX: vpsubw +; AVX: vpsrlw $1 +; AVX: vpaddw +; AVX: vpsrlw $2 +; AVX-NOT: vpmulhuw +} + +define <8 x i16> @test5(<8 x i16> %a) { + %div = sdiv <8 x i16> %a, + ret <8 x i16> %div + +; SSE-LABEL: test5: +; SSE: pmulhw +; SSE: psrlw $15 +; SSE: psraw $1 +; SSE: paddw + +; AVX-LABEL: test5: +; AVX: vpmulhw +; AVX: vpsrlw $15 +; AVX: vpsraw $1 +; AVX: vpaddw +} + +define <16 x i16> @test6(<16 x i16> %a) { + %div = sdiv <16 x i16> %a, + ret <16 x i16> %div + +; AVX-LABEL: test6: +; AVX: vpmulhw +; AVX: vpsrlw $15 +; AVX: vpsraw $1 +; AVX: vpaddw +; AVX-NOT: vpmulhw +} + ; TODO: sdiv -> pmuldq -- cgit v1.2.3