From bf73fe5e8d4b24399b3adfd2eb490878558b342c Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Fri, 1 Oct 2010 21:39:35 +0000 Subject: Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else. llvm-svn: 115352 --- llvm/test/CodeGen/X86/vec_insert-7.ll | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'llvm/test/CodeGen/X86/vec_insert-7.ll') diff --git a/llvm/test/CodeGen/X86/vec_insert-7.ll b/llvm/test/CodeGen/X86/vec_insert-7.ll index 789d2b9fd79..268b5c4bf97 100644 --- a/llvm/test/CodeGen/X86/vec_insert-7.ll +++ b/llvm/test/CodeGen/X86/vec_insert-7.ll @@ -1,12 +1,12 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -mtriple=i686-apple-darwin9 | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=i686-apple-darwin9 | FileCheck %s ; MMX insertelement is not available; these are promoted to XMM. ; (Without SSE they are split to two ints, and the code is much better.) define x86_mmx @mmx_movzl(x86_mmx %x) nounwind { entry: ; CHECK: mmx_movzl -; FIXMEHECK: pinsrd -; FIXMEHECK: pinsrd +; CHECK: pinsrd +; CHECK: pinsrd %tmp = bitcast x86_mmx %x to <2 x i32> %tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0 ; <<2 x i32>> [#uses=1] %tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1 ; <<2 x i32>> [#uses=1] -- cgit v1.2.3