From 5b0aacf1c79eedafe9e735e459f67e831bc8cd68 Mon Sep 17 00:00:00 2001 From: Andrea Di Biagio Date: Sat, 22 Mar 2014 01:47:22 +0000 Subject: [DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode::isConstantSplat' This patch renames method 'isConstantSplat' as 'getConstantSplatValue' (mainly for consistency reasons), and rewrites its logic to ensure that we always perform a legal 'cast'. Added test shift-combine-crash.ll to verify that DAGCombiner no longer crashes with an assertion failure in the attempt to simplify a vector shift by a vector of all undef counts. llvm-svn: 204536 --- llvm/test/CodeGen/X86/shift-combine-crash.ll | 57 ++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 llvm/test/CodeGen/X86/shift-combine-crash.ll (limited to 'llvm/test/CodeGen/X86/shift-combine-crash.ll') diff --git a/llvm/test/CodeGen/X86/shift-combine-crash.ll b/llvm/test/CodeGen/X86/shift-combine-crash.ll new file mode 100644 index 00000000000..a69a907d41b --- /dev/null +++ b/llvm/test/CodeGen/X86/shift-combine-crash.ll @@ -0,0 +1,57 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 > /dev/null + +; Verify that DAGCombiner doesn't crash with an assertion failure in the +; attempt to cast a ISD::UNDEF node to a ConstantSDNode. + +; During type legalization, the vector shift operation in function @test1 is +; split into two legal shifts that work on <2 x i64> elements. +; The first shift of the legalized sequence would be a shift by all undefs. +; DAGCombiner will then try to simplify the vector shift and check if the +; vector of shift counts is a splat. Make sure that llc doesn't crash +; at that stage. + + +define <4 x i64> @test1(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +; Also, verify that DAGCombiner doesn't crash when trying to combine shifts +; with different combinations of undef elements in the vector shift count. + +define <4 x i64> @test2(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test3(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test4(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test5(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test6(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test7(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + +define <4 x i64> @test8(<4 x i64> %A) { + %shl = shl <4 x i64> %A, + ret <4 x i64> %shl +} + + -- cgit v1.2.3