From 8a42d4b9cc038744eeb3f3276a6ecb36a32018c0 Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Tue, 13 Sep 2016 00:21:32 +0000 Subject: X86: Conditional tail calls should not have isBarrier = 1 That confuses e.g. machine basic block placement, which then doesn't realize that control can fall through a block that ends with a conditional tail call. Instead, isBranch=1 should be set. Also, mark EFLAGS as used by these instructions. llvm-svn: 281281 --- llvm/test/CodeGen/X86/conditional-tailcall.ll | 32 +++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) (limited to 'llvm/test/CodeGen/X86/conditional-tailcall.ll') diff --git a/llvm/test/CodeGen/X86/conditional-tailcall.ll b/llvm/test/CodeGen/X86/conditional-tailcall.ll index 5dfdfd49ceb..502643d9a91 100644 --- a/llvm/test/CodeGen/X86/conditional-tailcall.ll +++ b/llvm/test/CodeGen/X86/conditional-tailcall.ll @@ -14,12 +14,40 @@ bb1: bb2: tail call void @bar() ret void -} ; CHECK-LABEL: f: ; CHECK: cmp ; CHECK: jne bar ; Check that the asm doesn't just look good, but uses the correct encoding. ; CHECK: encoding: [0x75,A] - ; CHECK: jmp foo +} + + +declare x86_thiscallcc zeroext i1 @baz(i8*, i32) +define x86_thiscallcc zeroext i1 @BlockPlacementTest(i8* %this, i32 %x) optsize { +entry: + %and = and i32 %x, 42 + %tobool = icmp eq i32 %and, 0 + br i1 %tobool, label %land.end, label %land.rhs + +land.rhs: + %and6 = and i32 %x, 44 + %tobool7 = icmp eq i32 %and6, 0 + br i1 %tobool7, label %lor.rhs, label %land.end + +lor.rhs: + %call = tail call x86_thiscallcc zeroext i1 @baz(i8* %this, i32 %x) #2 + br label %land.end + +land.end: + %0 = phi i1 [ false, %entry ], [ true, %land.rhs ], [ %call, %lor.rhs ] + ret i1 %0 + +; Make sure machine block placement isn't confused by the conditional tail call, +; but sees that it can fall through to the next block. +; CHECK-LABEL: BlockPlacementTest +; CHECK: je baz +; CHECK-NOT: xor +; CHECK: ret +} -- cgit v1.2.3