From 6397963c815b88ebe98ed8376bce042862d59fe2 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 25 Mar 2017 19:58:36 +0000
Subject: [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAI

Part 2 of 3.

Differential Revision: https://reviews.llvm.org/D31347

llvm-svn: 298780
---
 llvm/test/CodeGen/X86/combine-and.ll | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'llvm/test/CodeGen/X86/combine-and.ll')

diff --git a/llvm/test/CodeGen/X86/combine-and.ll b/llvm/test/CodeGen/X86/combine-and.ll
index 00e5f8f847a..352705b48d9 100644
--- a/llvm/test/CodeGen/X86/combine-and.ll
+++ b/llvm/test/CodeGen/X86/combine-and.ll
@@ -254,7 +254,7 @@ define <8 x i16> @ashr_mask1_v8i16(<8 x i16> %a0) {
 ; CHECK-LABEL: ashr_mask1_v8i16:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    psraw $15, %xmm0
-; CHECK-NEXT:    pand {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    psrlw $15, %xmm0
 ; CHECK-NEXT:    retq
   %1 = ashr <8 x i16> %a0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
   %2 = and <8 x i16> %1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
@@ -265,7 +265,7 @@ define <4 x i32> @ashr_mask7_v4i32(<4 x i32> %a0) {
 ; CHECK-LABEL: ashr_mask7_v4i32:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    psrad $31, %xmm0
-; CHECK-NEXT:    pand {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    psrld $29, %xmm0
 ; CHECK-NEXT:    retq
   %1 = ashr <4 x i32> %a0, <i32 31, i32 31, i32 31, i32 31>
   %2 = and <4 x i32> %1, <i32 7, i32 7, i32 7, i32 7>
-- 
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