From f3be7a7ea79e1042362f4dba4869cf4a4c8c3fc9 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 23 May 2008 00:37:07 +0000 Subject: Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks. Also fixed some 80 col. violations. llvm-svn: 51462 --- llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll (limited to 'llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll') diff --git a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll new file mode 100644 index 00000000000..c9e30d8f80a --- /dev/null +++ b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movups | count 2 + +define void @a(<4 x float>* %x) nounwind { +entry: + %tmp2 = load <4 x float>* %x, align 1 + %inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2) + store <4 x float> %inv, <4 x float>* %x, align 1 + ret void +} + +declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) -- cgit v1.2.3