From 2a417b96d47e7b08f81f2ba27951db56f5424fca Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Wed, 6 Aug 2014 11:13:14 +0000 Subject: ARM: do not generate BLX instructions on Cortex-M CPUs. Particularly on MachO, we were generating "blx _dest" instructions on M-class CPUs, which don't actually exist. They happen to get fixed up by the linker into valid "bl _dest" instructions (which is why such a massive issue has remained largely undetected), but we shouldn't rely on that. llvm-svn: 214959 --- llvm/test/CodeGen/Thumb2/cortex-fp.ll | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'llvm/test/CodeGen/Thumb2/cortex-fp.ll') diff --git a/llvm/test/CodeGen/Thumb2/cortex-fp.ll b/llvm/test/CodeGen/Thumb2/cortex-fp.ll index e63970a97e1..41e4b6873d4 100644 --- a/llvm/test/CodeGen/Thumb2/cortex-fp.ll +++ b/llvm/test/CodeGen/Thumb2/cortex-fp.ll @@ -6,7 +6,7 @@ define float @foo(float %a, float %b) { entry: ; CHECK-LABEL: foo: -; CORTEXM3: blx ___mulsf3 +; CORTEXM3: bl ___mulsf3 ; CORTEXM4: vmul.f32 s ; CORTEXA8: vmul.f32 d %0 = fmul float %a, %b @@ -17,8 +17,8 @@ define double @bar(double %a, double %b) { entry: ; CHECK-LABEL: bar: %0 = fmul double %a, %b -; CORTEXM3: blx ___muldf3 -; CORTEXM4: blx ___muldf3 +; CORTEXM3: bl ___muldf3 +; CORTEXM4: bl ___muldf3 ; CORTEXA8: vmul.f64 d ret double %0 } -- cgit v1.2.3