From 84f54a3bc9067cf9b48584d3da4e71049c490cac Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 11 Jul 2013 08:59:12 +0000 Subject: [SystemZ] Use zeroing form of RISBG for some AND sequences RISBG can handle some ANDs for which no AND IMMEDIATE exists. It also acts as a three-operand AND for some cases where an AND IMMEDIATE could be used instead. It might be worth adding a pass to replace RISBG with AND IMMEDIATE in cases where the register operands end up being the same and where AND IMMEDIATE is smaller. llvm-svn: 186072 --- llvm/test/CodeGen/SystemZ/insert-02.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'llvm/test/CodeGen/SystemZ/insert-02.ll') diff --git a/llvm/test/CodeGen/SystemZ/insert-02.ll b/llvm/test/CodeGen/SystemZ/insert-02.ll index 471889dede6..e9980144e9e 100644 --- a/llvm/test/CodeGen/SystemZ/insert-02.ll +++ b/llvm/test/CodeGen/SystemZ/insert-02.ll @@ -33,7 +33,7 @@ define i64 @f2(i64 %orig, i8 *%ptr) { ; register value. We can use IC but must keep the original mask. define i64 @f3(i64 %orig, i8 *%ptr) { ; CHECK: f3: -; CHECK: nill %r2, 65024 +; CHECK: risbg %r2, %r2, 0, 182, 0 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 %val = load i8 *%ptr @@ -46,7 +46,7 @@ define i64 @f3(i64 %orig, i8 *%ptr) { ; Like f3, but with the operands reversed. define i64 @f4(i64 %orig, i8 *%ptr) { ; CHECK: f4: -; CHECK: nill %r2, 65024 +; CHECK: risbg %r2, %r2, 0, 182, 0 ; CHECK: ic %r2, 0(%r3) ; CHECK: br %r14 %val = load i8 *%ptr -- cgit v1.2.3