From 25528d6de70e98683722e28655d8568d5f09b5c7 Mon Sep 17 00:00:00 2001 From: Francis Visoiu Mistrih Date: Mon, 4 Dec 2017 17:18:51 +0000 Subject: [CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665 --- llvm/test/CodeGen/PowerPC/testComparesineull.ll | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'llvm/test/CodeGen/PowerPC/testComparesineull.ll') diff --git a/llvm/test/CodeGen/PowerPC/testComparesineull.ll b/llvm/test/CodeGen/PowerPC/testComparesineull.ll index 6d645f5d33b..ba388a45fad 100644 --- a/llvm/test/CodeGen/PowerPC/testComparesineull.ll +++ b/llvm/test/CodeGen/PowerPC/testComparesineull.ll @@ -10,7 +10,7 @@ define signext i32 @test_ineull(i64 %a, i64 %b) { ; CHECK-LABEL: test_ineull: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: xor r3, r3, r4 ; CHECK-NEXT: addic r4, r3, -1 ; CHECK-NEXT: subfe r3, r4, r3 @@ -23,7 +23,7 @@ entry: define signext i32 @test_ineull_sext(i64 %a, i64 %b) { ; CHECK-LABEL: test_ineull_sext: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: xor r3, r3, r4 ; CHECK-NEXT: subfic r3, r3, 0 ; CHECK-NEXT: subfe r3, r3, r3 @@ -36,7 +36,7 @@ entry: define signext i32 @test_ineull_z(i64 %a) { ; CHECK-LABEL: test_ineull_z: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addic r4, r3, -1 ; CHECK-NEXT: subfe r3, r4, r3 ; CHECK-NEXT: blr @@ -48,7 +48,7 @@ entry: define signext i32 @test_ineull_sext_z(i64 %a) { ; CHECK-LABEL: test_ineull_sext_z: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: subfic r3, r3, 0 ; CHECK-NEXT: subfe r3, r3, r3 ; CHECK-NEXT: blr @@ -60,7 +60,7 @@ entry: define void @test_ineull_store(i64 %a, i64 %b) { ; CHECK-LABEL: test_ineull_store: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: xor r3, r3, r4 ; CHECK-NEXT: ld r12, .LC0@toc@l(r5) @@ -77,7 +77,7 @@ entry: define void @test_ineull_sext_store(i64 %a, i64 %b) { ; CHECK-LABEL: test_ineull_sext_store: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r5, r2, .LC0@toc@ha ; CHECK-NEXT: xor r3, r3, r4 ; CHECK-NEXT: ld r12, .LC0@toc@l(r5) @@ -94,7 +94,7 @@ entry: define void @test_ineull_z_store(i64 %a) { ; CHECK-LABEL: test_ineull_z_store: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: addic r5, r3, -1 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) @@ -110,7 +110,7 @@ entry: define void @test_ineull_sext_z_store(i64 %a) { ; CHECK-LABEL: test_ineull_sext_z_store: -; CHECK: # BB#0: # %entry +; CHECK: # %bb.0: # %entry ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-NEXT: subfic r3, r3, 0 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4) -- cgit v1.2.3