From 7630b8c5ee3109986a013b71f7b9352b23101aad Mon Sep 17 00:00:00 2001 From: Tony Jiang Date: Mon, 16 Jan 2017 14:43:12 +0000 Subject: [PowerPC] Expand ISEL instruction into if-then-else sequence. Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292128 --- llvm/test/CodeGen/PowerPC/fold-zero.ll | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'llvm/test/CodeGen/PowerPC/fold-zero.ll') diff --git a/llvm/test/CodeGen/PowerPC/fold-zero.ll b/llvm/test/CodeGen/PowerPC/fold-zero.ll index 5e620ece0a9..180d8e1b9f5 100644 --- a/llvm/test/CodeGen/PowerPC/fold-zero.ll +++ b/llvm/test/CodeGen/PowerPC/fold-zero.ll @@ -1,5 +1,6 @@ ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-crbits | FileCheck %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck -check-prefix=CHECK-CRB %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck --check-prefix=CHECK-CRB %s +; RUN: llc -verify-machineinstrs -ppc-gen-isel=false < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck --check-prefix=CHECK-NO-ISEL %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -7,19 +8,33 @@ define i32 @test1(i1 %a, i32 %c) nounwind { %x = select i1 %a, i32 %c, i32 0 ret i32 %x -; CHECK: @test1 +; CHECK-LABEL: @test1 ; CHECK-NOT: li {{[0-9]+}}, 0 ; CHECK: isel 3, 0, ; CHECK: blr +; CHECK-NO-ISEL-LABEL: @test1 +; CHECK-NO-ISEL: li 3, 0 +; CHECK-NO-ISEL-NEXT: bc 12, 1, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL-NEXT: blr +; CHECK-NO-ISEL-NEXT: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 3, 4, 0 +; CHECK-NO-ISEL-NEXT: blr } define i32 @test2(i1 %a, i32 %c) nounwind { %x = select i1 %a, i32 0, i32 %c ret i32 %x -; CHECK-CRB: @test2 +; CHECK-CRB-LABEL: @test2 ; CHECK-CRB-NOT: li {{[0-9]+}}, 0 ; CHECK-CRB: isel 3, 0, ; CHECK-CRB: blr +; CHECK-NO-ISEL-LABEL: @test2 +; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] +; CHECK-NO-ISEL: ori 3, 4, 0 +; CHECK-NO-ISEL-NEXT: blr +; CHECK-NO-ISEL-NEXT: [[TRUE]] +; CHECK-NO-ISEL-NEXT: addi 3, 0, 0 +; CHECK-NO-ISEL-NEXT: blr } -- cgit v1.2.3