From e85b06d65f695c576df1e529ee37cb15e6902401 Mon Sep 17 00:00:00 2001 From: Francis Visoiu Mistrih Date: Wed, 14 Mar 2018 21:52:13 +0000 Subject: [CodeGen] Use MIR syntax for MachineMemOperand printing Get rid of the "; mem:" suffix and use the one we use in MIR: ":: (load 2)". rdar://38163529 Differential Revision: https://reviews.llvm.org/D42377 llvm-svn: 327580 --- llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll') diff --git a/llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll b/llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll index 45cc740d1ea..37240c575fa 100644 --- a/llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll +++ b/llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll @@ -9,13 +9,13 @@ define i64 @func1(i64 %p1, i64 %p2, i64 %p3, i64 %p4, { i64, i8* } %struct) { ; so we expect the LD8 to load from the address used in the original HIBITS ; load. ; CHECK-LABEL: Initial selection DAG: -; CHECK-DAG: [[LOBITS:t[0-9]+]]: i32,ch = load -; CHECK-DAG: [[HIBITS:t[0-9]+]]: i32,ch = load +; CHECK-DAG: [[LOBITS:t[0-9]+]]: i32,ch = load<(load 4 from %fixed-stack.1)> +; CHECK-DAG: [[HIBITS:t[0-9]+]]: i32,ch = load<(load 4 from %fixed-stack.2)> ; CHECK: Combining: t{{[0-9]+}}: i64 = build_pair [[LOBITS]], [[HIBITS]] ; CHECK-NEXT: Creating new node -; CHECK-SAME: load ; CHECK-NEXT: into -; CHECK-SAME: load ; CHECK-LABEL: Optimized lowered selection DAG: %result = extractvalue {i64, i8* } %struct, 0 ret i64 %result -- cgit v1.2.3