From a535270d916085cc6dad2163804fd2f11a555429 Mon Sep 17 00:00:00 2001
From: Akira Hatanaka <ahatanak@gmail.com>
Date: Thu, 31 Mar 2011 18:26:17 +0000
Subject: Added support for FP conditional move instructions and fixed bugs in
 handling of FP comparisons.

llvm-svn: 128650
---
 llvm/test/CodeGen/Mips/fpcmp.ll | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 llvm/test/CodeGen/Mips/fpcmp.ll

(limited to 'llvm/test/CodeGen/Mips/fpcmp.ll')

diff --git a/llvm/test/CodeGen/Mips/fpcmp.ll b/llvm/test/CodeGen/Mips/fpcmp.ll
new file mode 100644
index 00000000000..51d55f0a7c4
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/fpcmp.ll
@@ -0,0 +1,23 @@
+; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
+; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+
+@g1 = external global i32
+
+define i32 @f(float %f0, float %f1) nounwind {
+entry:
+; CHECK-MIPS32R2: c.olt.s
+; CHECK-MIPS32R2: movt
+; CHECK-MIPS32R2: c.olt.s
+; CHECK-MIPS32R2: movt
+; CHECK-MIPS1: c.olt.s
+; CHECK-MIPS1: bc1f
+; CHECK-MIPS1: c.olt.s
+; CHECK-MIPS1: bc1f
+  %cmp = fcmp olt float %f0, %f1
+  %conv = zext i1 %cmp to i32
+  %tmp2 = load i32* @g1, align 4
+  %add = add nsw i32 %tmp2, %conv
+  store i32 %add, i32* @g1, align 4
+  %cond = select i1 %cmp, i32 10, i32 20
+  ret i32 %cond
+}
-- 
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