From 06bd6d304e70c6afde37c24a499018ec48daf84c Mon Sep 17 00:00:00 2001
From: Nadav Rotem <nadav.rotem@intel.com>
Date: Sat, 4 Jun 2011 20:58:08 +0000
Subject: TypeLegalizer: Add support for passing of vector-promoted types in
 registers (copyFromParts/copyToParts).

llvm-svn: 132649
---
 llvm/test/CodeGen/Generic/basic-promote-integers.ll | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 llvm/test/CodeGen/Generic/basic-promote-integers.ll

(limited to 'llvm/test/CodeGen/Generic')

diff --git a/llvm/test/CodeGen/Generic/basic-promote-integers.ll b/llvm/test/CodeGen/Generic/basic-promote-integers.ll
new file mode 100644
index 00000000000..13402bfd58f
--- /dev/null
+++ b/llvm/test/CodeGen/Generic/basic-promote-integers.ll
@@ -0,0 +1,20 @@
+; Test that vectors are scalarized/lowered correctly
+; (with both legalization methods).
+; RUN: llc -march=x86 -promote-elements < %s
+; RUN: llc -march=x86                   < %s
+
+; A simple test to check copyToParts and copyFromParts
+
+define <4 x i64> @test_param_0(<4 x i64> %A, <2 x i32> %B, <4 x i8> %C)  {
+   ret <4 x i64> %A
+}
+
+define <2 x i32> @test_param_1(<4 x i64> %A, <2 x i32> %B, <4 x i8> %C)  {
+   ret <2 x i32> %B
+}
+
+define <4 x i8> @test_param_2(<4 x i64> %A, <2 x i32> %B, <4 x i8> %C)  {
+   ret <4 x i8> %C
+}
+
+
-- 
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